blob: 7f19e215028ba25f31ae281b40fcfe005e312a8c [file] [log] [blame]
Patrick Georgi11f00792020-03-04 15:10:45 +01001/* SPDX-License-Identifier: GPL-2.0-only */
Aaron Durbine581b062015-09-03 11:29:28 -05002
Aaron Durbinaef58652016-04-29 12:34:01 -05003/*
Arthur Heymansc05b1a62019-11-22 21:01:30 +01004 * This path is for stages that are post bootblock. The gdt is reloaded
5 * to accommodate platforms that are executing out of CAR. In order to
6 * continue with C code execution one needs to set stack pointer and
7 * clear .bss variables that are stage specific.
Andrey Petrov73f70692016-02-28 22:37:15 -08008 */
Felix Heldca928c62020-04-04 01:47:37 +02009
10#if CONFIG(RESET_VECTOR_IN_RAM)
11 #define _STACK_TOP _eearlyram_stack
12#else
13 #define _STACK_TOP _ecar_stack
14#endif
15
Patrick Rudolphadcf7822020-08-27 20:50:18 +020016#if ENV_X86_64
Patrick Rudolph29ed4f52020-07-05 08:46:55 +020017.code64
18#else
19.code32
20#endif
21
Andrey Petrov73f70692016-02-28 22:37:15 -080022.section ".text._start", "ax", @progbits
23.global _start
24_start:
25
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -070026 /* Migrate GDT to this text segment */
Patrick Rudolphadcf7822020-08-27 20:50:18 +020027#if ENV_X86_64
Patrick Rudolph29ed4f52020-07-05 08:46:55 +020028 call gdt_init64
29#else
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -070030 call gdt_init
Patrick Rudolph29ed4f52020-07-05 08:46:55 +020031#endif
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -070032
Felix Heldca928c62020-04-04 01:47:37 +020033 /* reset stack pointer to CAR/EARLYRAM stack */
34 mov $_STACK_TOP, %esp
Andrey Petrov73f70692016-02-28 22:37:15 -080035
Jeremy Compostellab7832de2023-08-30 15:42:09 -070036#if ENV_SEPARATE_DATA_AND_BSS
Kyösti Mälkki910490f2019-08-22 12:56:22 +030037 /* clear .bss section as it is not shared */
Andrey Petrov73f70692016-02-28 22:37:15 -080038 cld
39 xor %eax, %eax
Kyösti Mälkki910490f2019-08-22 12:56:22 +030040 movl $(_ebss), %ecx
41 movl $(_bss), %edi
Andrey Petrov73f70692016-02-28 22:37:15 -080042 sub %edi, %ecx
Kyösti Mälkki5cbaba42019-08-28 20:52:37 +030043 shrl $2, %ecx
Andrey Petrov73f70692016-02-28 22:37:15 -080044 rep stosl
Jeremy Compostellab7832de2023-08-30 15:42:09 -070045
46 /* Copy .data section content to Cache-As-Ram */
47 movl $(_edata), %ecx
48 movl $(_data), %edi
49 sub %edi, %ecx
50 shrl $2, %ecx
51 movl $(_data_load),%esi
52 rep movsl
Arthur Heymans9efb0c02020-11-30 14:03:51 +010053#endif
Andrey Petrov73f70692016-02-28 22:37:15 -080054
Julius Werner21a40532020-04-21 16:03:53 -070055#if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
Arthur Heymansa2bc2542021-05-29 08:10:49 +020056 || (ENV_SEPARATE_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
Lee Leahyd131ea32016-06-08 13:40:08 -070057
58 /* Wait for a JTAG debugger to break in and set EBX non-zero */
59 xor %ebx, %ebx
60
61debug_spinloop:
62 cmp $0, %ebx
63 jz debug_spinloop
64#endif
65
Marshall Dawsonce9c8832017-07-07 16:09:56 -060066 andl $0xfffffff0, %esp
Julius Wernercd49cce2019-03-05 16:53:33 -080067#if CONFIG(IDT_IN_EVERY_STAGE)
Aaron Durbin4b032e42018-04-20 01:39:30 -060068 call exception_init
69#endif
Harshit Sharmaa6ebe082020-07-20 00:21:05 -070070
71#if CONFIG(ASAN_IN_ROMSTAGE)
72 call asan_init
73#endif
Marshall Dawsonce9c8832017-07-07 16:09:56 -060074 call car_stage_entry
Andrey Petrov73f70692016-02-28 22:37:15 -080075
Aaron Durbinafec0712019-08-28 07:34:51 -060076 /* Expect to never return. */
Andrey Petrov73f70692016-02-28 22:37:15 -0800771:
78 jmp 1b