Harsha B R | 63444c7 | 2022-12-13 13:26:47 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
Harsha B R | a256bd6 | 2022-11-09 19:47:40 +0530 | [diff] [blame^] | 3 | #include <baseboard/variants.h> |
Harsha B R | 63444c7 | 2022-12-13 13:26:47 +0530 | [diff] [blame] | 4 | #include <device/device.h> |
| 5 | #include <drivers/intel/gma/opregion.h> |
| 6 | #include <ec/ec.h> |
| 7 | #include <ec/intel/board_id.h> |
| 8 | #include <soc/ramstage.h> |
| 9 | #include <smbios.h> |
| 10 | #include <stdint.h> |
| 11 | #include <string.h> |
| 12 | |
| 13 | const char *smbios_system_sku(void) |
| 14 | { |
| 15 | static char sku_str[7] = ""; |
| 16 | uint8_t sku_id = get_rvp_board_id(); |
| 17 | |
| 18 | snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); |
| 19 | return sku_str; |
| 20 | } |
| 21 | |
| 22 | const char *mainboard_vbt_filename(void) |
| 23 | { |
| 24 | return "vbt.bin"; |
| 25 | } |
| 26 | |
| 27 | void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *cfg) |
| 28 | { |
| 29 | /* TODO: Update mainboard */ |
| 30 | } |
| 31 | |
| 32 | static void mainboard_init(void *chip_info) |
| 33 | { |
Harsha B R | a256bd6 | 2022-11-09 19:47:40 +0530 | [diff] [blame^] | 34 | configure_gpio_pads(); |
| 35 | |
Harsha B R | 63444c7 | 2022-12-13 13:26:47 +0530 | [diff] [blame] | 36 | if (CONFIG(EC_GOOGLE_CHROMEEC)) |
| 37 | mainboard_ec_init(); |
| 38 | } |
| 39 | |
| 40 | static void mainboard_enable(struct device *dev) |
| 41 | { |
| 42 | /* TODO: Enable mainboard */ |
| 43 | } |
| 44 | |
| 45 | struct chip_operations mainboard_ops = { |
| 46 | .init = mainboard_init, |
| 47 | .enable_dev = mainboard_enable, |
| 48 | }; |