Karthikeyan Ramasubramanian | a84d4f23 | 2022-02-02 10:10:03 -0700 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
Jon Murphy | 4f73242 | 2022-08-05 15:43:44 -0600 | [diff] [blame] | 2 | chip soc/amd/mendocino |
Jon Murphy | ee67ddc | 2022-02-17 20:40:23 -0700 | [diff] [blame] | 3 | |
| 4 | # eSPI Configuration |
| 5 | register "common_config.espi_config" = "{ |
| 6 | .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN, |
| 7 | .generic_io_range[0] = { |
| 8 | .base = 0x62, |
| 9 | /* |
| 10 | * Only 0x62 and 0x66 are required. But, this is not supported by |
| 11 | * standard IO decodes and there are only 4 generic I/O windows |
| 12 | * available. Hence, open a window from 0x62-0x67. |
| 13 | */ |
| 14 | .size = 5, |
| 15 | }, |
| 16 | .generic_io_range[1] = { |
| 17 | .base = 0x800, /* EC_HOST_CMD_REGION0 */ |
| 18 | .size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */ |
| 19 | }, |
| 20 | .generic_io_range[2] = { |
| 21 | .base = 0x900, /* EC_LPC_ADDR_MEMMAP */ |
| 22 | .size = 255, /* EC_MEMMAP_SIZE */ |
| 23 | }, |
| 24 | .generic_io_range[3] = { |
| 25 | .base = 0x200, /* EC_LPC_ADDR_HOST_DATA */ |
| 26 | .size = 8, /* 0x200 - 0x207 */ |
| 27 | }, |
| 28 | |
| 29 | .io_mode = ESPI_IO_MODE_QUAD, |
Karthikeyan Ramasubramanian | 9842bef | 2022-03-31 17:50:48 -0600 | [diff] [blame] | 30 | .op_freq_mhz = ESPI_OP_FREQ_16_MHZ, |
Jon Murphy | ee67ddc | 2022-02-17 20:40:23 -0700 | [diff] [blame] | 31 | .crc_check_enable = 1, |
Karthikeyan Ramasubramanian | 9842bef | 2022-03-31 17:50:48 -0600 | [diff] [blame] | 32 | .alert_pin = ESPI_ALERT_PIN_OPEN_DRAIN, |
Jon Murphy | ee67ddc | 2022-02-17 20:40:23 -0700 | [diff] [blame] | 33 | .periph_ch_en = 1, |
| 34 | .vw_ch_en = 1, |
| 35 | .oob_ch_en = 0, |
| 36 | .flash_ch_en = 0, |
| 37 | |
Jon Murphy | 3f62507 | 2022-04-18 13:19:23 -0600 | [diff] [blame] | 38 | .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1), |
Jon Murphy | ee67ddc | 2022-02-17 20:40:23 -0700 | [diff] [blame] | 39 | }" |
| 40 | |
Jon Murphy | 410b7cb | 2022-02-17 20:21:37 -0700 | [diff] [blame] | 41 | register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | |
| 42 | GPIO_I2C2_SCL | GPIO_I2C3_SCL" |
| 43 | |
Raul E Rangel | 4fdcefc | 2022-03-16 11:30:19 -0600 | [diff] [blame] | 44 | # I2C Pad Control RX Select Configuration |
| 45 | register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" # Touchpad |
| 46 | register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" # Touchscreen |
| 47 | register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # Audio/SAR |
| 48 | register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # GSC |
| 49 | |
Jon Murphy | d540d7c | 2022-08-16 11:31:03 -0600 | [diff] [blame] | 50 | # I2C Config |
| 51 | #+-------------------+----------------------------+ |
| 52 | #| Field | Value | |
| 53 | #+-------------------+----------------------------+ |
| 54 | #| I2C0 | Trackpad | |
| 55 | #| I2C1 | Touchscreen | |
| 56 | #| I2C2 | Speaker, Codec, P-SAR, USB | |
| 57 | #| I2C3 | D2 TPM | |
| 58 | #+-------------------+----------------------------+ |
| 59 | register "i2c[0]" = "{ |
| 60 | .speed = I2C_SPEED_FAST, |
| 61 | }" |
| 62 | |
| 63 | register "i2c[1]" = "{ |
| 64 | .speed = I2C_SPEED_FAST, |
| 65 | }" |
| 66 | |
| 67 | register "i2c[2]" = "{ |
| 68 | .speed = I2C_SPEED_FAST, |
| 69 | }" |
| 70 | |
| 71 | register "i2c[3]" = "{ |
| 72 | .speed = I2C_SPEED_FAST, |
| 73 | .early_init = true, |
| 74 | }" |
| 75 | |
Chris.Wang | ec7a932 | 2022-04-01 14:53:39 +0800 | [diff] [blame] | 76 | # general purpose PCIe clock output configuration |
| 77 | register "gpp_clk_config[0]" = "GPP_CLK_REQ" |
| 78 | register "gpp_clk_config[1]" = "GPP_CLK_REQ" |
| 79 | register "gpp_clk_config[2]" = "GPP_CLK_REQ" |
| 80 | register "gpp_clk_config[3]" = "GPP_CLK_OFF" |
| 81 | |
Felix Held | 5b51faa | 2022-03-18 16:57:22 +0100 | [diff] [blame] | 82 | register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works |
| 83 | |
Felix Held | 743627f | 2022-05-23 18:42:58 +0200 | [diff] [blame] | 84 | register "s0ix_enable" = "true" |
| 85 | |
Karthikeyan Ramasubramanian | a84d4f23 | 2022-02-02 10:10:03 -0700 | [diff] [blame] | 86 | device domain 0 on |
Jon Murphy | cbf0f98 | 2022-02-16 06:47:46 -0700 | [diff] [blame] | 87 | device ref lpc_bridge on |
| 88 | chip ec/google/chromeec |
| 89 | device pnp 0c09.0 alias chrome_ec on end |
| 90 | end |
| 91 | end |
Jon Murphy | 9df0085 | 2022-02-17 22:42:57 -0700 | [diff] [blame] | 92 | device ref gpp_bridge_0 on # WLAN |
Robert Zieba | 247d034 | 2022-07-11 11:01:33 -0600 | [diff] [blame] | 93 | chip drivers/pcie/generic |
| 94 | register "wake_gpe" = "GEVENT_8" |
| 95 | register "wake_deepest" = "ACPI_S0" |
| 96 | register "name" = ""WLAN"" |
Jon Murphy | 9df0085 | 2022-02-17 22:42:57 -0700 | [diff] [blame] | 97 | device pci 00.0 on end |
| 98 | end |
| 99 | end |
Jason Glenesk | e212bdb | 2022-06-16 21:46:12 -0700 | [diff] [blame] | 100 | device ref iommu on end |
Jon Murphy | e6e46c9 | 2022-02-17 22:14:38 -0700 | [diff] [blame] | 101 | device ref gpp_bridge_1 on end # SD |
JasonNien | 4a0e5e4 | 2022-12-13 13:35:53 -0600 | [diff] [blame] | 102 | device ref gpp_bridge_2 on |
| 103 | # Required so the NVMe gets placed into D3 when entering S0i3. |
| 104 | chip drivers/pcie/rtd3/device |
| 105 | register "name" = ""NVME"" |
| 106 | device pci 00.0 on end |
| 107 | end |
| 108 | end # NVMe |
Jon Murphy | e6e46c9 | 2022-02-17 22:14:38 -0700 | [diff] [blame] | 109 | |
Jon Murphy | 10ff937 | 2022-02-17 16:03:04 -0700 | [diff] [blame] | 110 | device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A |
| 111 | device ref gfx on end # Internal GPU (GFX) |
Felix Held | 6e43836 | 2022-05-20 20:35:53 +0200 | [diff] [blame] | 112 | device ref gfx_hda on end # Display HD Audio Controller (GFXAZ) |
Felix Held | b29f7d3 | 2022-05-20 20:27:21 +0200 | [diff] [blame] | 113 | device ref crypto on end # Crypto Coprocessor |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 114 | device ref xhci_0 on # USB 3.1 (USB0) |
| 115 | chip drivers/usb/acpi |
| 116 | device ref xhci_0_root_hub on |
| 117 | chip drivers/usb/acpi |
Jon Murphy | 7e63dfa | 2022-05-19 13:39:03 -0600 | [diff] [blame] | 118 | register "desc" = ""USB3 Type-C Port C0 (MLB)"" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 119 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
Won Chung | b344b3c | 2022-06-01 16:55:42 +0000 | [diff] [blame] | 120 | register "use_custom_pld" = "true" |
| 121 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 122 | device ref usb3_port0 on end |
| 123 | end |
| 124 | chip drivers/usb/acpi |
Jon Murphy | 7e63dfa | 2022-05-19 13:39:03 -0600 | [diff] [blame] | 125 | register "desc" = ""USB2 Type-C Port C0 (MLB)"" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 126 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
Won Chung | b344b3c | 2022-06-01 16:55:42 +0000 | [diff] [blame] | 127 | register "use_custom_pld" = "true" |
| 128 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 129 | device ref usb2_port0 on end |
| 130 | end |
| 131 | chip drivers/usb/acpi |
| 132 | register "desc" = ""User-Facing Camera"" |
| 133 | register "type" = "UPC_TYPE_INTERNAL" |
| 134 | device ref usb2_port1 on end |
| 135 | end |
| 136 | end |
| 137 | end |
Jon Murphy | b4156412 | 2022-02-17 16:05:58 -0700 | [diff] [blame] | 138 | end |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 139 | device ref xhci_1 on # USB 3.1 (USB1) |
| 140 | chip drivers/usb/acpi |
| 141 | device ref xhci_1_root_hub on |
| 142 | chip drivers/usb/acpi |
Jon Murphy | 7e63dfa | 2022-05-19 13:39:03 -0600 | [diff] [blame] | 143 | register "desc" = ""USB3 Type-C Port C1 (DB)"" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 144 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
Won Chung | b344b3c | 2022-06-01 16:55:42 +0000 | [diff] [blame] | 145 | register "use_custom_pld" = "true" |
| 146 | register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 147 | device ref usb3_port2 on end |
| 148 | end |
| 149 | chip drivers/usb/acpi |
Jon Murphy | 7e63dfa | 2022-05-19 13:39:03 -0600 | [diff] [blame] | 150 | register "desc" = ""USB2 Type-C Port C1 (DB)"" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 151 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
Won Chung | b344b3c | 2022-06-01 16:55:42 +0000 | [diff] [blame] | 152 | register "use_custom_pld" = "true" |
| 153 | register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 154 | device ref usb2_port2 on end |
| 155 | end |
| 156 | chip drivers/usb/acpi |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 157 | register "desc" = ""World-Facing Camera"" |
| 158 | register "type" = "UPC_TYPE_INTERNAL" |
| 159 | device ref usb2_port4 on end |
| 160 | end |
| 161 | end |
| 162 | end |
| 163 | end |
Felix Held | e0ea930 | 2022-05-20 20:34:20 +0200 | [diff] [blame] | 164 | device ref acp on end # Audio Processor (ACP) |
Felix Held | a149018 | 2022-12-01 18:51:49 +0100 | [diff] [blame^] | 165 | device ref mp2 on end # Sensor Fusion Hub (MP2) |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 166 | end |
| 167 | device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C |
| 168 | device ref xhci_2 on # USB 2.0 (USB2) |
| 169 | chip drivers/usb/acpi |
| 170 | register "type" = "UPC_TYPE_HUB" |
| 171 | device usb 0.0 alias xhci_2_root_hub on |
| 172 | chip drivers/usb/acpi |
| 173 | register "desc" = ""Bluetooth"" |
| 174 | register "type" = "UPC_TYPE_INTERNAL" |
Karthikeyan Ramasubramanian | 3804114 | 2022-12-19 11:46:07 -0700 | [diff] [blame] | 175 | register "has_power_resource" = "true" |
| 176 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_10)" |
| 177 | # TODO(b/263161283): Confirm the delay meets the requirement of all BT controllers |
| 178 | register "enable_delay_ms" = "500" |
| 179 | register "enable_off_delay_ms" = "200" |
| 180 | register "use_gpio_for_status" = "true" |
Felix Held | ae7ec18 | 2022-03-09 19:57:20 +0100 | [diff] [blame] | 181 | device usb 2.0 alias usb2_port5 on end |
Jon Murphy | 6ad5f4e | 2022-02-17 16:12:14 -0700 | [diff] [blame] | 182 | end |
| 183 | end |
| 184 | end |
Jon Murphy | b4156412 | 2022-02-17 16:05:58 -0700 | [diff] [blame] | 185 | end |
Jon Murphy | 10ff937 | 2022-02-17 16:03:04 -0700 | [diff] [blame] | 186 | end |
Karthikeyan Ramasubramanian | a84d4f23 | 2022-02-02 10:10:03 -0700 | [diff] [blame] | 187 | end # domain |
Jon Murphy | 4b2e04a | 2022-02-17 14:54:46 -0700 | [diff] [blame] | 188 | device ref uart_0 on end # UART0 |
Jon Murphy | 410b7cb | 2022-02-17 20:21:37 -0700 | [diff] [blame] | 189 | device ref i2c_0 on end |
| 190 | device ref i2c_1 on end |
| 191 | device ref i2c_2 on end |
Jon Murphy | 0bc013b | 2022-02-17 21:05:19 -0700 | [diff] [blame] | 192 | device ref i2c_3 on |
| 193 | chip drivers/i2c/tpm |
| 194 | register "hid" = ""GOOG0005"" |
| 195 | register "desc" = ""Ti50 TPM"" |
| 196 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_18)" |
Mark Hasemeyer | 7d8f7fb | 2022-11-18 20:25:44 -0700 | [diff] [blame] | 197 | device i2c 50 alias ti50 on end |
Jon Murphy | 0bc013b | 2022-02-17 21:05:19 -0700 | [diff] [blame] | 198 | end |
| 199 | end |
Fred Reitberger | 7627e07 | 2022-06-27 10:26:34 -0400 | [diff] [blame] | 200 | |
| 201 | # EC is configured to power off the system at 105C, so add a two degree |
| 202 | # buffer so the OS can gracefully shutdown. |
| 203 | # |
| 204 | # EC is configured to assert PROCHOT at 100C. That drastically lowers |
| 205 | # performance. Instead we will tell the OS to start throttling the CPUs |
| 206 | # at 95C in hopes that we don't hit the PROCHOT limit. |
| 207 | # |
| 208 | # We set use_acpi1_thermal_zone_scope because the Chrome ec.asl |
| 209 | # performs a `Notify` to the `_\TZ` scope. |
| 210 | chip drivers/acpi/thermal_zone |
| 211 | register "description" = ""Charger"" |
| 212 | use chrome_ec as temperature_controller |
| 213 | register "sensor_id" = "0" |
| 214 | register "polling_period" = "10" |
| 215 | register "critical_temperature" = "103" |
| 216 | register "passive_config.temperature" = "95" |
| 217 | register "use_acpi1_thermal_zone_scope" = "true" |
| 218 | |
| 219 | device generic 0 on end |
| 220 | end |
| 221 | chip drivers/acpi/thermal_zone |
| 222 | register "description" = ""Memory"" |
| 223 | use chrome_ec as temperature_controller |
| 224 | register "sensor_id" = "1" |
| 225 | register "polling_period" = "10" |
| 226 | register "critical_temperature" = "103" |
| 227 | register "passive_config.temperature" = "95" |
| 228 | register "use_acpi1_thermal_zone_scope" = "true" |
| 229 | |
| 230 | device generic 1 on end |
| 231 | end |
| 232 | chip drivers/acpi/thermal_zone |
| 233 | register "description" = ""CPU"" |
| 234 | use chrome_ec as temperature_controller |
| 235 | register "sensor_id" = "2" |
| 236 | register "polling_period" = "10" |
| 237 | register "critical_temperature" = "103" |
| 238 | register "passive_config.temperature" = "95" |
| 239 | register "use_acpi1_thermal_zone_scope" = "true" |
| 240 | |
| 241 | device generic 2 on end |
| 242 | end |
| 243 | chip drivers/acpi/thermal_zone |
| 244 | register "description" = ""SOC"" |
| 245 | use chrome_ec as temperature_controller |
| 246 | register "sensor_id" = "3" |
| 247 | register "polling_period" = "10" |
| 248 | register "critical_temperature" = "103" |
| 249 | register "passive_config.temperature" = "95" |
| 250 | register "use_acpi1_thermal_zone_scope" = "true" |
| 251 | |
| 252 | device generic 3 on end |
| 253 | end |
Tim Van Patten | 5bd21db | 2022-11-22 10:40:14 -0700 | [diff] [blame] | 254 | |
| 255 | # DPTC: Refer the spec "FT6 Infrastructure Roadmap"#57316 |
| 256 | # Set system_configuration to 4 for 15W |
| 257 | register "system_configuration" = "4" |
| 258 | # Normal |
| 259 | register "slow_ppt_limit_mW" = "25000" |
| 260 | register "fast_ppt_limit_mW" = "30000" |
| 261 | register "slow_ppt_time_constant_s" = "5" |
| 262 | register "stapm_time_constant_s" = "275" |
| 263 | register "sustained_power_limit_mW" = "15000" |
| 264 | register "thermctl_limit_degreeC" = "100" |
| 265 | register "vrm_current_limit_mA" = "28000" |
| 266 | register "vrm_maximum_current_limit_mA" = "50000" |
| 267 | register "vrm_soc_current_limit_mA" = "10000" |
| 268 | # Throttle (e.g., Low/No Battery) |
| 269 | register "vrm_current_limit_throttle_mA" = "20000" |
| 270 | register "vrm_maximum_current_limit_throttle_mA" = "20000" |
| 271 | register "vrm_soc_current_limit_throttle_mA" = "10000" |
Jon Murphy | 4f73242 | 2022-08-05 15:43:44 -0600 | [diff] [blame] | 272 | end # chip soc/amd/mendocino |