src/mainboard/google/brya/variants/skolas4es/overridetree.cb

fw_config
	field DB_USB 0 3
		option USB_ABSENT		0
		option USB3_PS8815		1
	end
	field DB_SD 4 5
		option SD_ABSENT		0
		option SD_GL9755S		1
	end
	field KB_BL 7 7
		option KB_BL_ABSENT		0
		option KB_BL_PRESENT		1
	end
	field AUDIO 8 10
		option AUDIO_UNKNOWN			0
		option MAX98357_ALC5682I_I2S		1
		option MAX98373_ALC5682_SNDW		2
		option MAX98373_NAU88L25B_I2S		3
		option ALC1019_NAU88L25B_I2S		4
		option MAX98360_ALC5682I_I2S		5
	end
	field DB_LTE 11 12
		option LTE_ABSENT		0
		option LTE_USB			1
		option LTE_PCIE			2
	end
	field UFC 13 14
		option UFC_USB			0
		option UFC_MIPI_IMX208		1
	end
	field WFC 15 16
		option WFC_ABSENT		0
		option WFC_MIPI_OVTI5675	1
		option WFC_MIPI_OVTI8856	2
	end
	field HPS 17 17
		option HPS_ABSENT               0
		option HPS_PRESENT              1
	end
end

chip soc/intel/alderlake
	register "domain_vr_config[VR_DOMAIN_IA]" = "{
		.enable_fast_vmode = 1,
	}"

	register "sagv" = "SaGv_Enabled"

	# As per Intel Advisory doc#723158, the change is required to prevent possible
	# display flickering issue.
	register "disable_dynamic_tccold_handshake" = "true"

	register "platform_pmax" = "145"

	register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)"	# Type-A MLB Port

	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port

	register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"

	# FIVR configurations for brya are disabled since the board doesn't have V1p05 and Vnn
	# bypass rails implemented.
	register "ext_fivr_settings" = "{
		.configure_ext_fivr = 1,
	}"

	# Intel Common SoC Config
	#+-------------------+---------------------------+
	#| Field             |  Value                    |
	#+-------------------+---------------------------+
	#| GSPI1             | Fingerprint MCU           |
	#| I2C0              | Audio                     |
	#| I2C1              | cr50 TPM. Early init is   |
	#|                   | required to set up a BAR  |
	#|                   | for TPM communication     |
	#| I2C2              | SAR                       |
	#| I2C3              | TouchScreen               |
	#| I2C5              | Trackpad                  |
	#+-------------------+---------------------------+
	register "common_soc_config" = "{
		.i2c[0] = {
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 650,
			.fall_time_ns = 400,
			.data_hold_time_ns = 50,
		},
		.i2c[1] = {
			.early_init = 1,
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 600,
			.fall_time_ns = 400,
			.data_hold_time_ns = 50,
		},
		.i2c[2] = {
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 900,
			.fall_time_ns = 400,
			.data_hold_time_ns = 50,
		},
		.i2c[3] = {
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 650,
			.fall_time_ns = 400,
			.data_hold_time_ns = 50,
		},
		.i2c[5] = {
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 650,
			.fall_time_ns = 400,
			.data_hold_time_ns = 50,
		},
	}"

	device domain 0 on
		device ref dtt on
			chip drivers/intel/dptf
				## sensor information
				register "options.tsr[0].desc" = ""DRAM_SOC""
				register "options.tsr[1].desc" = ""Ambient""
				register "options.tsr[2].desc" = ""Charger""
				register "options.tsr[3].desc" = ""WWAN""

				# TODO: below values are initial reference values only
				## Active Policy
				register "policies.active" = "{
					[0] = {
						.target = DPTF_CPU,
						.thresholds = {
								TEMP_PCT(85, 90),
								TEMP_PCT(80, 80),
								TEMP_PCT(75, 70),
								TEMP_PCT(70, 50),
								TEMP_PCT(65, 30),
						}
					},
					[1] = {
						.target = DPTF_TEMP_SENSOR_1,
						.thresholds = {
								TEMP_PCT(50, 90),
								TEMP_PCT(48, 70),
								TEMP_PCT(46, 60),
								TEMP_PCT(43, 40),
								TEMP_PCT(40, 30),
						}
					}
				}"

				## Passive Policy
				register "policies.passive" = "{
					[0] = DPTF_PASSIVE(CPU,         CPU,           95, 5000),
					[1] = DPTF_PASSIVE(CPU,         TEMP_SENSOR_0, 75, 5000),
					[2] = DPTF_PASSIVE(CPU,		TEMP_SENSOR_1, 75, 5000),
					[3] = DPTF_PASSIVE(CHARGER,	TEMP_SENSOR_2, 75, 5000),
					[4] = DPTF_PASSIVE(CPU,         TEMP_SENSOR_3, 75, 5000),
				}"

				## Critical Policy
				register "policies.critical" = "{
					[0] = DPTF_CRITICAL(CPU,               105, SHUTDOWN),
					[1] = DPTF_CRITICAL(TEMP_SENSOR_0,      85, SHUTDOWN),
					[2] = DPTF_CRITICAL(TEMP_SENSOR_1,      85, SHUTDOWN),
					[3] = DPTF_CRITICAL(TEMP_SENSOR_2,      85, SHUTDOWN),
					[4] = DPTF_CRITICAL(TEMP_SENSOR_3,      85, SHUTDOWN),
				}"

				register "controls.power_limits" = "{
					.pl1 = {
							.min_power = 3000,
							.max_power = 15000,
							.time_window_min = 28 * MSECS_PER_SEC,
							.time_window_max = 32 * MSECS_PER_SEC,
							.granularity = 200,
						},
					.pl2 = {
							.min_power = 55000,
							.max_power = 55000,
							.time_window_min = 28 * MSECS_PER_SEC,
							.time_window_max = 32 * MSECS_PER_SEC,
							.granularity = 1000,
						}
				}"

				## Charger Performance Control (Control, mA)
				register "controls.charger_perf" = "{
					[0] = { 255, 1700 },
					[1] = {  24, 1500 },
					[2] = {  16, 1000 },
					[3] = {   8,  500 }
				}"

				## Fan Performance Control (Percent, Speed, Noise, Power)
				register "controls.fan_perf" = "{
					[0] = {  90, 6700, 220, 2200, },
					[1] = {  80, 5800, 180, 1800, },
					[2] = {  70, 5000, 145, 1450, },
					[3] = {  60, 4900, 115, 1150, },
					[4] = {  50, 3838,  90,  900, },
					[5] = {  40, 2904,  55,  550, },
					[6] = {  30, 2337,  30,  300, },
					[7] = {  20, 1608,  15,  150, },
					[8] = {  10,  800,  10,  100, },
					[9] = {   0,    0,   0,   50, }
				}"

				## Fan options
				register "options.fan.fine_grained_control" = "1"
				register "options.fan.step_size" = "2"

				device generic 0 alias dptf_policy on end
			end
		end
		device ref ipu on
			chip drivers/intel/mipi_camera
				register "acpi_uid" = "0x50000"
				register "acpi_name" = ""IPU0""
				register "device_type" = "INTEL_ACPI_CAMERA_CIO2"

				register "cio2_num_ports" = "1"
				register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
				register "cio2_lane_endpoint[0]" = ""^I2C0.CAM0""
				register "cio2_prt[0]" = "2"
				device generic 0 on
					# MIPI lanes are split between UFC and WFC depending on
					# whether the UFC is USB or MIPI hence probing UFC_USB
					probe UFC UFC_USB
				end
			end
			chip drivers/intel/mipi_camera
				register "acpi_uid" = "0x50000"
				register "acpi_name" = ""IPU0""
				register "device_type" = "INTEL_ACPI_CAMERA_CIO2"

				register "cio2_num_ports" = "2"
				register "cio2_lanes_used" = "{4,2}" # 4 and 2 CSI Camera lanes are used
				register "cio2_lane_endpoint[0]" = ""^I2C0.CAM0""
				register "cio2_lane_endpoint[1]" = ""^I2C2.CAM1""
				register "cio2_prt[0]" = "2"
				register "cio2_prt[1]" = "1"
				device generic 1 on
					probe UFC UFC_MIPI_IMX208
				end
			end
		end
		device ref cnvi_wifi on
			chip drivers/wifi/generic
				register "wake" = "GPE0_PME_B0"
				register "enable_cnvi_ddr_rfim" = "true"
				device generic 0 on end
			end
		end
		device ref pcie_rp6 on
			# Enable WWAN PCIE 6 using clk 5
			register "pch_pcie_rp[PCH_RP(6)]" = "{
				.clk_src = 5,
				.clk_req = 5,
				.flags = PCIE_RP_LTR | PCIE_RP_AER,
			}"
			chip soc/intel/common/block/pcie/rtd3
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
				register "reset_off_delay_ms" = "20"
				# register "reset_delay_ms" = "1000"
				register "srcclk_pin" = "5"
				register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
				register "skip_on_off_support" = "true"
				device generic 0 alias rp6_rtd3 on
					probe DB_LTE LTE_PCIE
				end
			end
			chip drivers/wwan/fm
				register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
				register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
				register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
				register "add_acpi_dma_property" = "true"
				use rp6_rtd3 as rtd3dev
				device generic 0 on
					probe DB_LTE LTE_PCIE
				end
			end
			probe DB_LTE LTE_PCIE
		end
		device ref tcss_dma0 on
			chip drivers/intel/usb4/retimer
				register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
				use tcss_usb3_port1 as dfp[0].typec_port
				device generic 0 on end
			end
		end
		device ref tcss_dma1 on
			chip drivers/intel/usb4/retimer
				register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
				use tcss_usb3_port3 as dfp[0].typec_port
				device generic 0 on end
			end
		end
		device ref pcie_rp8 on
			chip soc/intel/common/block/pcie/rtd3
				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
				register "srcclk_pin" = "3"
				device generic 0 on end
			end
		end	#PCIE8 SD card
		device ref i2c0 on
			chip drivers/i2c/generic
				register "hid" = ""10EC5682""
				register "name" = ""RT58""
				register "desc" = ""Headset Codec""
				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
				# Set the jd_src to RT5668_JD1 for jack detection
				register "property_count" = "1"
				register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
				register "property_list[0].name" = ""realtek,jd-src""
				register "property_list[0].integer" = "1"
				device i2c 1a on
					probe AUDIO MAX98357_ALC5682I_I2S
					probe AUDIO MAX98360_ALC5682I_I2S
				end
			end
			chip drivers/i2c/nau8825
				register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A23)"
				register "jkdet_enable" = "1"
				register "jkdet_pull_enable" = "0"
				register "jkdet_polarity" = "1"		# ActiveLow
				register "vref_impedance" = "2"		# 125kOhm
				register "micbias_voltage" = "6"	# 2.754
				register "sar_threshold_num" = "4"
				register "sar_threshold[0]" = "0x0c"
				register "sar_threshold[1]" = "0x1c"
				register "sar_threshold[2]" = "0x38"
				register "sar_threshold[3]" = "0x60"
				register "sar_hysteresis" = "1"
				register "sar_voltage" = "0"		# VDDA
				register "sar_compare_time" = "0"	# 500ns
				register "sar_sampling_time" = "0"	# 2us
				register "short_key_debounce" = "2"	# 100ms
				register "jack_insert_debounce" = "7"	# 512ms
				register "jack_eject_debounce" = "7"	# 512ms
				device i2c 1a on
					probe AUDIO ALC1019_NAU88L25B_I2S
				end
			end
			chip drivers/generic/alc1015
				register "hid" = ""RTL1019""
				register "sdb" =  "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
				device generic 1 on
					probe AUDIO ALC1019_NAU88L25B_I2S
				end
			end
			chip drivers/intel/mipi_camera
				register "acpi_hid" = ""OVTI8856""
				register "acpi_uid" = "0"
				register "acpi_name" = ""CAM0""
				register "chip_name" = ""Ov 8856 Camera""
				register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"

				register "ssdb.lanes_used" = "4"
				register "ssdb.link_used" = "0"
				register "ssdb.vcm_type" = "0x0C"
				register "vcm_name" = ""VCM0""
				register "num_freq_entries" = "2"
				register "link_freq[0]" = "360 * MHz" # 360 MHz
				register "link_freq[1]" = "180 * MHz" # 180 MHz
				register "remote_name" = ""IPU0""
				register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"

				register "has_power_resource" = "1"
				#Controls
				register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
				register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"

				register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8
				register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2
				register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset

				#_ON
				register "on_seq.ops_cnt" = "5"
				register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
				register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
				register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
				register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
				register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"

				#_OFF
				register "off_seq.ops_cnt" = "4"
				register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
				register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
				register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
				register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"

				device i2c 10 on end
			end
			chip drivers/intel/mipi_camera
				register "acpi_uid" = "2"
				register "acpi_name" = ""VCM0""
				register "chip_name" = ""DW9768 VCM""
				register "device_type" = "INTEL_ACPI_CAMERA_VCM"
				register "vcm_compat" = ""dongwoon,dw9768""

				register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"

				register "has_power_resource" = "1"

				#Controls
				register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR

				#_ON
				register "on_seq.ops_cnt" = "1"
				register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"

				#_OFF
				register "off_seq.ops_cnt" = "1"
				register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"

				device i2c 0C on end
			end
			chip drivers/intel/mipi_camera
				register "acpi_uid" = "1"
				register "acpi_name" = ""NVM0""
				register "chip_name" = ""AT24 EEPROM""
				register "device_type" = "INTEL_ACPI_CAMERA_NVM"

				register "nvm_compat" = ""atmel,24c1024""

				register "nvm_size" = "0x2800"
				register "nvm_pagesize" = "0x01"
				register "nvm_readonly" = "0x01"
				register "nvm_width" = "0x10"

				register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"

				register "has_power_resource" = "1"

				#Controls
				register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR

				#_ON
				register "on_seq.ops_cnt" = "1"
				register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"

				#_OFF
				register "off_seq.ops_cnt" = "1"
				register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"

				device i2c 58 on end
			end
		end #I2C0
		device ref i2c1 on
			chip drivers/i2c/tpm
				register "hid" = ""GOOG0005""
				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
				device i2c 50 on end
			end
		end #I2C1
		device ref i2c2 on
			chip drivers/i2c/sx9324
				register "desc" = ""SAR1 Proximity Sensor""
				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
				register "speed" = "I2C_SPEED_FAST"
				register "uid" = "1"
				register "reg_gnrl_ctrl0" = "0x16"
				register "reg_gnrl_ctrl1" = "0x21"
				register "reg_afe_ctrl0" = "0x00"
				register "reg_afe_ctrl1" = "0x10"
				register "reg_afe_ctrl2" = "0x00"
				register "reg_afe_ctrl3" = "0x00"
				register "reg_afe_ctrl4" = "0x07"
				register "reg_afe_ctrl5" = "0x00"
				register "reg_afe_ctrl6" = "0x00"
				register "reg_afe_ctrl7" = "0x07"
				register "reg_afe_ctrl8" = "0x12"
				register "reg_afe_ctrl9" = "0x0f"
				register "reg_prox_ctrl0" = "0x12"
				register "reg_prox_ctrl1" = "0x12"
				register "reg_prox_ctrl2" = "0x90"
				register "reg_prox_ctrl3" = "0x60"
				register "reg_prox_ctrl4" = "0x0c"
				register "reg_prox_ctrl5" = "0x12"
				register "reg_prox_ctrl6" = "0x3c"
				register "reg_prox_ctrl7" = "0x58"
				register "reg_adv_ctrl0" = "0x00"
				register "reg_adv_ctrl1" = "0x00"
				register "reg_adv_ctrl2" = "0x00"
				register "reg_adv_ctrl3" = "0x00"
				register "reg_adv_ctrl4" = "0x00"
				register "reg_adv_ctrl5" = "0x05"
				register "reg_adv_ctrl6" = "0x00"
				register "reg_adv_ctrl7" = "0x00"
				register "reg_adv_ctrl8" = "0x00"
				register "reg_adv_ctrl9" = "0x00"
				register "reg_adv_ctrl10" = "0x5c"
				register "reg_adv_ctrl11" = "0x52"
				register "reg_adv_ctrl12" = "0xb5"
				register "reg_adv_ctrl13" = "0x00"
				register "reg_adv_ctrl14" = "0x80"
				register "reg_adv_ctrl15" = "0x0c"
				register "reg_adv_ctrl16" = "0x38"
				register "reg_adv_ctrl17" = "0x56"
				register "reg_adv_ctrl18" = "0x33"
				register "reg_adv_ctrl19" = "0xf0"
				register "reg_adv_ctrl20" = "0xf0"
				device i2c 28 on end
			end
			chip drivers/i2c/sx9324
				register "desc" = ""SAR2 Proximity Sensor""
				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
				register "speed" = "I2C_SPEED_FAST"
				register "uid" = "2"
				register "reg_gnrl_ctrl0" = "0x16"
				register "reg_gnrl_ctrl1" = "0x21"
				register "reg_afe_ctrl0" = "0x00"
				register "reg_afe_ctrl1" = "0x10"
				register "reg_afe_ctrl2" = "0x00"
				register "reg_afe_ctrl3" = "0x00"
				register "reg_afe_ctrl4" = "0x07"
				register "reg_afe_ctrl5" = "0x00"
				register "reg_afe_ctrl6" = "0x00"
				register "reg_afe_ctrl7" = "0x07"
				register "reg_afe_ctrl8" = "0x12"
				register "reg_afe_ctrl9" = "0x0f"
				register "reg_prox_ctrl0" = "0x12"
				register "reg_prox_ctrl1" = "0x12"
				register "reg_prox_ctrl2" = "0x90"
				register "reg_prox_ctrl3" = "0x60"
				register "reg_prox_ctrl4" = "0x0c"
				register "reg_prox_ctrl5" = "0x12"
				register "reg_prox_ctrl6" = "0x3c"
				register "reg_prox_ctrl7" = "0x58"
				register "reg_adv_ctrl0" = "0x00"
				register "reg_adv_ctrl1" = "0x00"
				register "reg_adv_ctrl2" = "0x00"
				register "reg_adv_ctrl3" = "0x00"
				register "reg_adv_ctrl4" = "0x00"
				register "reg_adv_ctrl5" = "0x05"
				register "reg_adv_ctrl6" = "0x00"
				register "reg_adv_ctrl7" = "0x00"
				register "reg_adv_ctrl8" = "0x00"
				register "reg_adv_ctrl9" = "0x00"
				register "reg_adv_ctrl10" = "0x5c"
				register "reg_adv_ctrl11" = "0x52"
				register "reg_adv_ctrl12" = "0xb5"
				register "reg_adv_ctrl13" = "0x00"
				register "reg_adv_ctrl14" = "0x80"
				register "reg_adv_ctrl15" = "0x0c"
				register "reg_adv_ctrl16" = "0x38"
				register "reg_adv_ctrl17" = "0x56"
				register "reg_adv_ctrl18" = "0x33"
				register "reg_adv_ctrl19" = "0xf0"
				register "reg_adv_ctrl20" = "0xf0"
				device i2c 2C on end
			end
			chip drivers/intel/mipi_camera
				register "acpi_hid" = ""INT3478""
				register "acpi_uid" = "0"
				register "acpi_name" = ""CAM1""
				register "chip_name" = ""imx 208 Camera""
				register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"

				register "ssdb.lanes_used" = "2"
				register "ssdb.link_used" = "1"
				register "num_freq_entries" = "2"
				register "link_freq[0]" = "384 * MHz" # 384 MHz
				register "link_freq[1]" = "96 * MHz" # 96 MHz
				register "remote_name" = ""IPU0""

				register "has_power_resource" = "1"
				#Controls
				register "gpio_panel.gpio[0].gpio_num" = "GPP_C3"  #PP3300_FCAM_X
				register "gpio_panel.gpio[1].gpio_num" = "GPP_A17" #EN_UCAM_PWR
				register "gpio_panel.gpio[2].gpio_num" = "GPP_F20" #reset
				register "gpio_panel.gpio[3].gpio_num" = "GPP_H21" #CLK_EN

				#_ON
				register "on_seq.ops_cnt" = "5"
				register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(3, 0)"
				register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
				register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
				register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
				register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"

				#_OFF
				register "off_seq.ops_cnt" = "4"
				register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(3, 0)"
				register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
				register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
				register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"

				device i2c 10 on
					probe UFC UFC_MIPI_IMX208
				end
			end
			chip drivers/intel/mipi_camera
				register "acpi_hid" = ""ACPI_DT_NAMESPACE_HID""
				register "acpi_uid" = "1"
				register "acpi_name" = ""NVM1""
				register "chip_name" = ""GT24C16S""
				register "device_type" = "INTEL_ACPI_CAMERA_NVM"

				register "pr0" = ""\\_SB.PCI0.I2C2.CAM1.PRIC""
				register "nvm_compat" = ""atmel,24c1024""

				register "nvm_size" = "0x800"
				register "nvm_pagesize" = "0x01"
				register "nvm_readonly" = "0x01"
				register "nvm_width" = "0x08"

				device i2c 50 on
					probe UFC UFC_MIPI_IMX208
				end
			end
			chip drivers/i2c/generic
				register "hid" = ""GOOG0020""
				register "desc" = ""ChromeOS HPS""
				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)"  # EN_HPS_PWR
				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)"  # HPS_INT_ODL
				# HPS uses I2C addresses 0x30 and 0x51.
				# The address we provide here is not significant because
				# neither coreboot nor Linux have a driver for HPS,
				# it's only used from userspace.
				device i2c 30 on
					probe HPS HPS_PRESENT
				end
			end
		end #I2C2
		device ref i2c3 on
			chip drivers/i2c/hid
				register "generic.hid" = ""ELAN9050""
				register "generic.desc" = ""ELAN Touchscreen""
				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
				register "generic.probed" = "1"
				register "generic.reset_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
				register "generic.reset_delay_ms" = "300"
				register "generic.reset_off_delay_ms" = "1"
				register "generic.enable_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
				register "generic.enable_delay_ms" = "6"
				register "generic.stop_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
				register "generic.stop_off_delay_ms" = "1"
				register "generic.has_power_resource" = "1"
				register "hid_desc_reg_offset" = "0x01"
				device i2c 0x10 on end
			end
			chip drivers/i2c/hid
				register "generic.hid" = ""GDIX0000""
				register "generic.desc" = ""Goodix Touchscreen""
				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
				register "generic.probed" = "1"
				register "generic.reset_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
				register "generic.reset_delay_ms" = "120"
				register "generic.reset_off_delay_ms" = "3"
				register "generic.enable_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
				register "generic.enable_delay_ms" = "12"
				register "generic.stop_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
				register "generic.stop_off_delay_ms" = "1"
				register "generic.has_power_resource" = "1"
				register "hid_desc_reg_offset" = "0x01"
				device i2c 0x5d on end
			end
			chip drivers/i2c/hid
				register "generic.hid" = ""SIS9815""
				register "generic.desc" = ""SIS Touchscreen""
				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
				register "generic.probed" = "1"
				register "generic.reset_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
				register "generic.stop_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
				register "generic.stop_delay_ms" = "100"
				register "generic.enable_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
				register "generic.enable_delay_ms" = "7"
				register "generic.has_power_resource" = "1"
				register "hid_desc_reg_offset" = "0x00"
				device i2c 5c on end
			end
		end #I2C3
		device ref i2c5 on
			chip drivers/i2c/generic
				register "hid" = ""ELAN0000""
				register "desc" = ""ELAN Touchpad""
				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
				register "wake" = "GPE0_DW2_14"
				register "detect" = "1"
				device i2c 15 on end
			end
		end #I2C5
		device ref hda on
			chip drivers/generic/max98357a
				register "hid" = ""MX98357A""
				register "sdmode_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
				register "sdmode_delay" = "5"
				device generic 0 on
					probe AUDIO MAX98357_ALC5682I_I2S
				end
			end

			chip drivers/generic/max98357a
				register "hid" = ""MX98360A""
				register "sdmode_gpio" =
						"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
				register "sdmode_delay" = "5"
				device generic 0 on
					probe AUDIO MAX98360_ALC5682I_I2S
				end
			end

			chip drivers/intel/soundwire
				device generic 0 on
					probe AUDIO MAX98373_ALC5682_SNDW
					chip drivers/soundwire/alc5682
						# SoundWire Link 0 ID 1
						register "desc" = ""Headset Codec""
						device generic 0.1 on end
					end
					chip drivers/soundwire/max98373
						# SoundWire Link 2 ID 3
						register "desc" = ""Left Speaker Amp""
						device generic 2.3 on end
					end
					chip drivers/soundwire/max98373
						# SoundWire Link 2 ID 7
						register "desc" = ""Right Speaker Amp""
						device generic 2.7 on end
					end
				end
			end
		end
		device ref gspi1 on
			chip drivers/spi/acpi
				register "name" = ""CRFP""
				register "hid" = "ACPI_DT_NAMESPACE_HID"
				register "uid" = "1"
				register "compat_string" = ""google,cros-ec-spi""
				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
				register "wake" = "GPE0_DW2_15"
				register "has_power_resource" = "1"
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
				register "enable_delay_ms" = "3"
				device spi 0 on end
			end # FPMCU
		end
		device ref pch_espi on
			chip ec/google/chromeec
				use conn0 as mux_conn[0]
				use conn1 as mux_conn[1]
				use conn2 as mux_conn[2]
				device pnp 0c09.0 on end
			end
		end
		device ref pmc hidden
			chip drivers/intel/pmc_mux
				device generic 0 on
					chip drivers/intel/pmc_mux/conn
						use usb2_port1 as usb2_port
						use tcss_usb3_port1 as usb3_port
						device generic 0 alias conn0 on end
					end
					chip drivers/intel/pmc_mux/conn
						use usb2_port2 as usb2_port
						use tcss_usb3_port2 as usb3_port
						device generic 1 alias conn1 on end
					end
					chip drivers/intel/pmc_mux/conn
						use usb2_port3 as usb2_port
						use tcss_usb3_port3 as usb3_port
						device generic 2 alias conn2 on end
					end
				end
			end
		end
		device ref tcss_xhci on
			chip drivers/usb/acpi
				device ref tcss_root_hub on
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-C Port C0 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
						device ref tcss_usb3_port1 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-C Port C1 (DB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
						device ref tcss_usb3_port2 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-C Port C2 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
						device ref tcss_usb3_port3 on end
					end
				end
			end
		end
		device ref xhci on
			chip drivers/usb/acpi
				device ref xhci_root_hub on
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-C Port C0 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
						device ref usb2_port1 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-C Port C1 (DB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
						device ref usb2_port2 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-C Port C2 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
						device ref usb2_port3 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 WWAN""
						register "type" = "UPC_TYPE_INTERNAL"
						device ref usb2_port4 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Camera""
						register "type" = "UPC_TYPE_INTERNAL"
						device ref usb2_port6 on
							probe UFC UFC_USB
						end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-A Port A0 (DB)""
						register "type" = "UPC_TYPE_A"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
						device ref usb2_port9 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Bluetooth""
						register "type" = "UPC_TYPE_INTERNAL"
						register "reset_gpio" =
							"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
						device ref usb2_port10 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-A Port A0 (DB)""
						register "type" = "UPC_TYPE_USB3_A"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
						device ref usb3_port1 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 WWAN""
						register "type" = "UPC_TYPE_INTERNAL"
						device ref usb3_port4 on end
					end
				end
			end
		end
	end
end