blob: ac78182199f7c7bd96a5cdd9604714b4c69af29f [file] [log] [blame]
Yinghai Lu13f1c2a2005-07-08 02:49:49 +00001#define ASSEMBLY 1
Stefan Reinauera0c68f82010-01-05 13:03:02 +00002#define __PRE_RAM__
Yinghai Lu13f1c2a2005-07-08 02:49:49 +00003#include <stdint.h>
4#include <device/pci_def.h>
5#include <device/pci_ids.h>
6#include <arch/io.h>
7#include <arch/romcc_io.h>
8#include <cpu/x86/lapic.h>
9#include "pc80/serial.c"
10#include "arch/i386/lib/console.c"
11#include "pc80/mc146818rtc_early.c"
12#include "cpu/x86/lapic/boot_cpu.c"
Uwe Hermann586470c2006-10-27 11:38:22 +000013#include "northbridge/intel/e7520/memory_initialized.c"
Yinghai Lu13f1c2a2005-07-08 02:49:49 +000014
15static unsigned long main(unsigned long bist)
16{
17 /* Did just the cpu reset? */
18 if (memory_initialized()) {
19 if (last_boot_normal()) {
20 goto normal_image;
21 } else {
22 goto cpu_reset;
23 }
24 }
25
26 /* This is the primary cpu how should I boot? */
27 else if (do_normal_boot()) {
28 goto normal_image;
29 }
30 else {
31 goto fallback_image;
32 }
33 normal_image:
34 asm volatile ("jmp __normal_image"
35 : /* outputs */
36 : "a" (bist) /* inputs */
37 : /* clobbers */
38 );
39 cpu_reset:
40 asm volatile ("jmp __cpu_reset"
41 : /* outputs */
42 : "a"(bist) /* inputs */
43 : /* clobbers */
44 );
45 fallback_image:
46 return bist;
47}