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Angel Ponse220e312020-07-22 00:55:38 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2
Angel Ponse4156c32020-09-14 15:47:59 +02003#ifndef __HASWELL_REGISTERS_HOST_BRIDGE_H__
4#define __HASWELL_REGISTERS_HOST_BRIDGE_H__
Angel Ponse220e312020-07-22 00:55:38 +02005
6#define EPBAR 0x40
7#define MCHBAR 0x48
Angel Ponse220e312020-07-22 00:55:38 +02008
Angel Ponseecd6842020-07-22 01:02:46 +02009#define GGC 0x50 /* GMCH Graphics Control */
Angel Ponse220e312020-07-22 00:55:38 +020010#define GGC_DISABLE_VGA_IO_DECODE (1 << 1)
11#define GGC_IGD_MEM_IN_32MB_UNITS(x) (((x) & 0x1f) << 3)
12#define GGC_GTT_0MB (0 << 8)
13#define GGC_GTT_1MB (1 << 8)
14#define GGC_GTT_2MB (2 << 8)
15
Angel Ponseecd6842020-07-22 01:02:46 +020016#define DEVEN 0x54 /* Device Enable */
Angel Ponse220e312020-07-22 00:55:38 +020017#define DEVEN_D7EN (1 << 14)
18#define DEVEN_D4EN (1 << 7)
19#define DEVEN_D3EN (1 << 5)
20#define DEVEN_D2EN (1 << 4)
21#define DEVEN_D1F0EN (1 << 3)
22#define DEVEN_D1F1EN (1 << 2)
23#define DEVEN_D1F2EN (1 << 1)
24#define DEVEN_D0EN (1 << 0)
25
Angel Ponseecd6842020-07-22 01:02:46 +020026#define PAVPC 0x58
27#define DPR 0x5c
Angel Pons4b290b72020-09-24 23:38:53 +020028#define DPR_EPM (1 << 2)
29#define DPR_PRS (1 << 1)
30#define DPR_SIZE_MASK 0xff0
Angel Ponseecd6842020-07-22 01:02:46 +020031
32#define PCIEXBAR 0x60
33#define DMIBAR 0x68
34
35#define MESEG_BASE 0x70 /* Management Engine Base */
36#define MESEG_LIMIT 0x78 /* Management Engine Limit */
37
Angel Ponse220e312020-07-22 00:55:38 +020038#define PAM0 0x80
39#define PAM1 0x81
40#define PAM2 0x82
41#define PAM3 0x83
42#define PAM4 0x84
43#define PAM5 0x85
44#define PAM6 0x86
45
46#define LAC 0x87 /* Legacy Access Control */
47#define SMRAM 0x88 /* System Management RAM Control */
48#define D_OPEN (1 << 6)
49#define D_CLS (1 << 5)
50#define D_LCK (1 << 4)
51#define G_SMRAME (1 << 3)
52#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
53
Angel Ponse220e312020-07-22 00:55:38 +020054#define REMAPBASE 0x90 /* Remap base */
55#define REMAPLIMIT 0x98 /* Remap limit */
56#define TOM 0xa0 /* Top of DRAM in memory controller space */
57#define TOUUD 0xa8 /* Top of Upper Usable DRAM */
58#define BDSM 0xb0 /* Base Data Stolen Memory */
59#define BGSM 0xb4 /* Base GTT Stolen Memory */
60#define TSEG 0xb8 /* TSEG base */
61#define TOLUD 0xbc /* Top of Low Used Memory */
62
63#define SKPAD 0xdc /* Scratchpad Data */
64
65#define CAPID0_A 0xe4
Patrick Rudolph42609d82020-07-27 16:23:36 +020066#define CAPID_ECCDIS (1 << 25)
Angel Ponse220e312020-07-22 00:55:38 +020067#define VTD_DISABLE (1 << 23)
Patrick Rudolph42609d82020-07-27 16:23:36 +020068#define CAPID_DDPCD (1 << 14)
69#define CAPID_PDCD (1 << 12)
70#define CAPID_DDRSZ(x) (((x) >> 19) & 0x3)
Angel Ponse220e312020-07-22 00:55:38 +020071
Angel Ponseecd6842020-07-22 01:02:46 +020072#define CAPID0_B 0xe8
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Angel Ponse4156c32020-09-14 15:47:59 +020074#endif /* __HASWELL_REGISTERS_HOST_BRIDGE_H__ */