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Ben Chuangff17b312020-09-03 16:02:46 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/* Driver for Genesys Logic GL9755 */
4
5#include <console/console.h>
6#include <device/device.h>
Ben Chuangff17b312020-09-03 16:02:46 +08007#include <device/pci.h>
8#include <device/pci_ops.h>
9#include <device/pci_ids.h>
10#include "gl9755.h"
11
Duncan Lauriebd8bb8ea2020-11-17 10:13:05 -080012static void gl9755_enable(struct device *dev)
Ben Chuangff17b312020-09-03 16:02:46 +080013{
Duncan Lauriebd8bb8ea2020-11-17 10:13:05 -080014 uint32_t reg;
15
16 printk(BIOS_INFO, "GL9755: configure ASPM and LTR\n");
Ben Chuangff17b312020-09-03 16:02:46 +080017
18 /* Set Vendor Config to be configurable */
19 pci_or_config32(dev, CFG, CFG_EN);
Duncan Lauriebd8bb8ea2020-11-17 10:13:05 -080020
Ben Chuangff17b312020-09-03 16:02:46 +080021 /* Set LTR value */
22 pci_write_config32(dev, LTR, NO_SNOOP_SCALE|NO_SNOOP_VALUE|SNOOP_SCALE|SNOOP_VALUE);
Duncan Lauriebd8bb8ea2020-11-17 10:13:05 -080023
24 /* Adjust L1 exit latency to enable ASPM */
25 reg = pci_read_config32(dev, CFG2);
26 reg &= ~CFG2_LAT_L1_MASK;
27 reg |= CFG2_LAT_L1_64US;
28 pci_write_config32(dev, CFG2, reg);
29
Ben Chuang325f4312021-09-14 11:31:42 +080030 /* Disable ASPM L0s support */
31 pci_and_config32(dev, CFG2, ~CFG2_L0S_SUPPORT);
32
Ben Chuang60243502021-02-05 17:33:38 +080033 /* Turn off debug mode to enable SCP/OCP */
34 pci_and_config32(dev, CFG3, ~SCP_DEBUG);
35
Ben Chuangff17b312020-09-03 16:02:46 +080036 /* Set Vendor Config to be non-configurable */
37 pci_and_config32(dev, CFG, ~CFG_EN);
38}
39
40static struct device_operations gl9755_ops = {
41 .read_resources = pci_dev_read_resources,
42 .set_resources = pci_dev_set_resources,
43 .enable_resources = pci_dev_enable_resources,
44 .ops_pci = &pci_dev_ops_pci,
Duncan Lauriebd8bb8ea2020-11-17 10:13:05 -080045 .enable = gl9755_enable
Ben Chuangff17b312020-09-03 16:02:46 +080046};
47
48static const unsigned short pci_device_ids[] = {
Felix Singer43b7f412022-03-07 04:34:52 +010049 PCI_DID_GLI_9755,
Ben Chuangff17b312020-09-03 16:02:46 +080050 0
51};
52
53static const struct pci_driver genesyslogic_gl9755 __pci_driver = {
54 .ops = &gl9755_ops,
Felix Singer43b7f412022-03-07 04:34:52 +010055 .vendor = PCI_VID_GLI,
Ben Chuangff17b312020-09-03 16:02:46 +080056 .devices = pci_device_ids,
57};
58
59struct chip_operations drivers_generic_genesyslogic_gl9755_ops = {
Nicholas Sudsgaardbfb11be2024-01-30 09:53:46 +090060 .name = "Genesys Logic GL9755",
Ben Chuangff17b312020-09-03 16:02:46 +080061};