| Hung-Te Lin | 9ede2ff | 2019-08-15 09:43:55 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2019 Huaqin Telecom Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include "../panel.h" |
| 17 | |
| 18 | struct panel_serializable_data P097PFG_SSD2858 = { |
| 19 | .edid = { |
| 20 | .ascii_string = "P097PFG", |
| 21 | .manufacturer_name = "CMN", |
| 22 | .panel_bits_per_color = 8, |
| 23 | .panel_bits_per_pixel = 24, |
| 24 | .mode = { |
| 25 | .pixel_clock = 211660, |
| 26 | .lvds_dual_channel = 0, |
| 27 | .refresh = 60, |
| 28 | .ha = 1536, .hbl = 160, .hso = 140, .hspw = 10, |
| 29 | .va = 2048, .vbl = 32, .vso = 20, .vspw = 2, |
| 30 | .phsync = '-', .pvsync = '-', |
| 31 | .x_mm = 147, .y_mm = 196, |
| 32 | }, |
| 33 | }, |
| 34 | .orientation = LB_FB_ORIENTATION_NORMAL, |
| 35 | .init = { |
| 36 | INIT_GENERIC_CMD(0xff, 0x00), |
| 37 | /* LOCKCNT=0x1f4, MRX=0, POSTDIV=1 (/2} }, MULT=0x49 |
| 38 | * 27 Mhz => 985.5 Mhz */ |
| 39 | INIT_GENERIC_CMD(0x00, 0x08, 0x01, 0xf4, 0x01, 0x49), |
| 40 | /* MTXDIV=1, SYSDIV=3 (=> 4) */ |
| 41 | INIT_GENERIC_CMD(0x00, 0x0c, 0x00, 0x00, 0x00, 0x03), |
| 42 | /* MTXVPF=24bpp, MRXLS=4 lanes, MRXVB=bypass, MRXECC=1, |
| 43 | * MRXEOT=1, MRXEE=1 */ |
| 44 | INIT_GENERIC_CMD(0x00, 0x14, 0x0c, 0x3d, 0x80, 0x0f), |
| 45 | INIT_GENERIC_CMD(0x00, 0x20, 0x15, 0x92, 0x56, 0x7d), |
| 46 | INIT_GENERIC_CMD(0x00, 0x24, 0x00, 0x00, 0x30, 0x00), |
| 47 | |
| 48 | INIT_GENERIC_CMD(0x10, 0x08, 0x01, 0x20, 0x08, 0x45), |
| 49 | INIT_GENERIC_CMD(0x10, 0x1c, 0x00, 0x00, 0x00, 0x00), |
| 50 | INIT_GENERIC_CMD(0x20, 0x0c, 0x00, 0x00, 0x00, 0x04), |
| 51 | /* Pixel clock 985.5 Mhz * 0x49/0x4b = 959 Mhz */ |
| 52 | INIT_GENERIC_CMD(0x20, 0x10, 0x00, 0x4b, 0x00, 0x49), |
| 53 | INIT_GENERIC_CMD(0x20, 0xa0, 0x00, 0x00, 0x00, 0x00), |
| 54 | /* EOT=1, LPE = 0, LSOUT=4 lanes, LPD=25 */ |
| 55 | INIT_GENERIC_CMD(0x60, 0x08, 0x00, 0xd9, 0x00, 0x08), |
| 56 | INIT_GENERIC_CMD(0x60, 0x14, 0x01, 0x00, 0x01, 0x06), |
| 57 | /* DSI0 enable (default: probably not needed) */ |
| 58 | INIT_GENERIC_CMD(0x60, 0x80, 0x00, 0x00, 0x00, 0x0f), |
| 59 | /* DSI1 enable */ |
| 60 | INIT_GENERIC_CMD(0x60, 0xa0, 0x00, 0x00, 0x00, 0x0f), |
| 61 | |
| 62 | /* HSA=0x18, VSA=0x02, HBP=0x50, VBP=0x0c */ |
| 63 | INIT_GENERIC_CMD(0x60, 0x0c, 0x0c, 0x50, 0x02, 0x18), |
| 64 | /* VACT= 0x800 (2048} }, VFP= 0x14, HFP=0x50 */ |
| 65 | INIT_GENERIC_CMD(0x60, 0x10, 0x08, 0x00, 0x14, 0x50), |
| 66 | /* HACT=0x300 (768) */ |
| 67 | INIT_GENERIC_CMD(0x60, 0x84, 0x00, 0x00, 0x03, 0x00), |
| 68 | INIT_GENERIC_CMD(0x60, 0xa4, 0x00, 0x00, 0x03, 0x00), |
| 69 | |
| 70 | /* Take panel out of sleep. */ |
| 71 | INIT_GENERIC_CMD(0xff, 0x01), |
| 72 | INIT_DCS_CMD(0x11), |
| 73 | INIT_DELAY_CMD(120), |
| 74 | INIT_DCS_CMD(0x29), |
| 75 | INIT_DELAY_CMD(20), |
| 76 | INIT_GENERIC_CMD(0xff, 0x00), |
| 77 | |
| 78 | INIT_DELAY_CMD(120), |
| 79 | INIT_DCS_CMD(0x11), |
| 80 | INIT_DELAY_CMD(120), |
| 81 | INIT_DCS_CMD(0x29), |
| 82 | INIT_DELAY_CMD(20), |
| 83 | INIT_END_CMD, |
| 84 | }, |
| 85 | }; |