| Hung-Te Lin | 9ede2ff | 2019-08-15 09:43:55 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2019 Huaqin Telecom Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include "../panel.h" |
| 17 | |
| 18 | struct panel_serializable_data BOE_TV101WUM_NL6 = { |
| 19 | .edid = { |
| 20 | .ascii_string = "TV101WUM-NL6", |
| 21 | .manufacturer_name = "BOE", |
| 22 | .panel_bits_per_color = 8, |
| 23 | .panel_bits_per_pixel = 24, |
| 24 | .mode = { |
| 25 | .pixel_clock = 159425, |
| 26 | .lvds_dual_channel = 0, |
| 27 | .refresh = 60, |
| 28 | .ha = 1200, .hbl = 164, .hso = 100, .hspw = 24, |
| 29 | .va = 1920, .vbl = 28, .vso = 10, .vspw = 4, |
| 30 | .phsync = '-', .pvsync = '-', |
| 31 | .x_mm = 135, .y_mm = 216, |
| 32 | }, |
| 33 | }, |
| 34 | .orientation = LB_FB_ORIENTATION_LEFT_UP, |
| 35 | .init = { |
| 36 | INIT_DELAY_CMD(24), |
| 37 | INIT_DCS_CMD(0xB0, 0x05), |
| 38 | INIT_DCS_CMD(0xB1, 0xE5), |
| 39 | INIT_DCS_CMD(0xB3, 0x52), |
| 40 | INIT_DCS_CMD(0xB0, 0x00), |
| 41 | INIT_DCS_CMD(0xB3, 0x88), |
| 42 | INIT_DCS_CMD(0xB0, 0x04), |
| 43 | INIT_DCS_CMD(0xB8, 0x00), |
| 44 | INIT_DCS_CMD(0xB0, 0x00), |
| 45 | INIT_DCS_CMD(0xB6, 0x03), |
| 46 | INIT_DCS_CMD(0xBA, 0x8B), |
| 47 | INIT_DCS_CMD(0xBF, 0x1A), |
| 48 | INIT_DCS_CMD(0xC0, 0x0F), |
| 49 | INIT_DCS_CMD(0xC2, 0x0C), |
| 50 | INIT_DCS_CMD(0xC3, 0x02), |
| 51 | INIT_DCS_CMD(0xC4, 0x0C), |
| 52 | INIT_DCS_CMD(0xC5, 0x02), |
| 53 | INIT_DCS_CMD(0xB0, 0x01), |
| 54 | INIT_DCS_CMD(0xE0, 0x26), |
| 55 | INIT_DCS_CMD(0xE1, 0x26), |
| 56 | INIT_DCS_CMD(0xDC, 0x00), |
| 57 | INIT_DCS_CMD(0xDD, 0x00), |
| 58 | INIT_DCS_CMD(0xCC, 0x26), |
| 59 | INIT_DCS_CMD(0xCD, 0x26), |
| 60 | INIT_DCS_CMD(0xC8, 0x00), |
| 61 | INIT_DCS_CMD(0xC9, 0x00), |
| 62 | INIT_DCS_CMD(0xD2, 0x03), |
| 63 | INIT_DCS_CMD(0xD3, 0x03), |
| 64 | INIT_DCS_CMD(0xE6, 0x04), |
| 65 | INIT_DCS_CMD(0xE7, 0x04), |
| 66 | INIT_DCS_CMD(0xC4, 0x09), |
| 67 | INIT_DCS_CMD(0xC5, 0x09), |
| 68 | INIT_DCS_CMD(0xD8, 0x0A), |
| 69 | INIT_DCS_CMD(0xD9, 0x0A), |
| 70 | INIT_DCS_CMD(0xC2, 0x0B), |
| 71 | INIT_DCS_CMD(0xC3, 0x0B), |
| 72 | INIT_DCS_CMD(0xD6, 0x0C), |
| 73 | INIT_DCS_CMD(0xD7, 0x0C), |
| 74 | INIT_DCS_CMD(0xC0, 0x05), |
| 75 | INIT_DCS_CMD(0xC1, 0x05), |
| 76 | INIT_DCS_CMD(0xD4, 0x06), |
| 77 | INIT_DCS_CMD(0xD5, 0x06), |
| 78 | INIT_DCS_CMD(0xCA, 0x07), |
| 79 | INIT_DCS_CMD(0xCB, 0x07), |
| 80 | INIT_DCS_CMD(0xDE, 0x08), |
| 81 | INIT_DCS_CMD(0xDF, 0x08), |
| 82 | INIT_DCS_CMD(0xB0, 0x02), |
| 83 | INIT_DCS_CMD(0xC0, 0x00), |
| 84 | INIT_DCS_CMD(0xC1, 0x0D), |
| 85 | INIT_DCS_CMD(0xC2, 0x17), |
| 86 | INIT_DCS_CMD(0xC3, 0x26), |
| 87 | INIT_DCS_CMD(0xC4, 0x31), |
| 88 | INIT_DCS_CMD(0xC5, 0x1C), |
| 89 | INIT_DCS_CMD(0xC6, 0x2C), |
| 90 | INIT_DCS_CMD(0xC7, 0x33), |
| 91 | INIT_DCS_CMD(0xC8, 0x31), |
| 92 | INIT_DCS_CMD(0xC9, 0x37), |
| 93 | INIT_DCS_CMD(0xCA, 0x37), |
| 94 | INIT_DCS_CMD(0xCB, 0x37), |
| 95 | INIT_DCS_CMD(0xCC, 0x39), |
| 96 | INIT_DCS_CMD(0xCD, 0x2E), |
| 97 | INIT_DCS_CMD(0xCE, 0x2F), |
| 98 | INIT_DCS_CMD(0xCF, 0x2F), |
| 99 | INIT_DCS_CMD(0xD0, 0x07), |
| 100 | INIT_DCS_CMD(0xD2, 0x00), |
| 101 | INIT_DCS_CMD(0xD3, 0x0D), |
| 102 | INIT_DCS_CMD(0xD4, 0x17), |
| 103 | INIT_DCS_CMD(0xD5, 0x26), |
| 104 | INIT_DCS_CMD(0xD6, 0x31), |
| 105 | INIT_DCS_CMD(0xD7, 0x3F), |
| 106 | INIT_DCS_CMD(0xD8, 0x3F), |
| 107 | INIT_DCS_CMD(0xD9, 0x3F), |
| 108 | INIT_DCS_CMD(0xDA, 0x3F), |
| 109 | INIT_DCS_CMD(0xDB, 0x37), |
| 110 | INIT_DCS_CMD(0xDC, 0x37), |
| 111 | INIT_DCS_CMD(0xDD, 0x37), |
| 112 | INIT_DCS_CMD(0xDE, 0x39), |
| 113 | INIT_DCS_CMD(0xDF, 0x2E), |
| 114 | INIT_DCS_CMD(0xE0, 0x2F), |
| 115 | INIT_DCS_CMD(0xE1, 0x2F), |
| 116 | INIT_DCS_CMD(0xE2, 0x07), |
| 117 | INIT_DCS_CMD(0xB0, 0x03), |
| 118 | INIT_DCS_CMD(0xC8, 0x0B), |
| 119 | INIT_DCS_CMD(0xC9, 0x07), |
| 120 | INIT_DCS_CMD(0xC3, 0x00), |
| 121 | INIT_DCS_CMD(0xE7, 0x00), |
| 122 | INIT_DCS_CMD(0xC5, 0x2A), |
| 123 | INIT_DCS_CMD(0xDE, 0x2A), |
| 124 | INIT_DCS_CMD(0xCA, 0x43), |
| 125 | INIT_DCS_CMD(0xC9, 0x07), |
| 126 | INIT_DCS_CMD(0xE4, 0xC0), |
| 127 | INIT_DCS_CMD(0xE5, 0x0D), |
| 128 | INIT_DCS_CMD(0xCB, 0x00), |
| 129 | INIT_DCS_CMD(0xB0, 0x06), |
| 130 | INIT_DCS_CMD(0xB8, 0xA5), |
| 131 | INIT_DCS_CMD(0xC0, 0xA5), |
| 132 | INIT_DCS_CMD(0xC7, 0x0F), |
| 133 | INIT_DCS_CMD(0xD5, 0x32), |
| 134 | INIT_DCS_CMD(0xB8, 0x00), |
| 135 | INIT_DCS_CMD(0xC0, 0x00), |
| 136 | INIT_DCS_CMD(0xBC, 0x00), |
| 137 | INIT_DCS_CMD(0xB0, 0x07), |
| 138 | INIT_DCS_CMD(0xB1, 0x00), |
| 139 | INIT_DCS_CMD(0xB2, 0x02), |
| 140 | INIT_DCS_CMD(0xB3, 0x0F), |
| 141 | INIT_DCS_CMD(0xB4, 0x25), |
| 142 | INIT_DCS_CMD(0xB5, 0x39), |
| 143 | INIT_DCS_CMD(0xB6, 0x4E), |
| 144 | INIT_DCS_CMD(0xB7, 0x72), |
| 145 | INIT_DCS_CMD(0xB8, 0x97), |
| 146 | INIT_DCS_CMD(0xB9, 0xDC), |
| 147 | INIT_DCS_CMD(0xBA, 0x22), |
| 148 | INIT_DCS_CMD(0xBB, 0xA4), |
| 149 | INIT_DCS_CMD(0xBC, 0x2B), |
| 150 | INIT_DCS_CMD(0xBD, 0x2F), |
| 151 | INIT_DCS_CMD(0xBE, 0xA9), |
| 152 | INIT_DCS_CMD(0xBF, 0x25), |
| 153 | INIT_DCS_CMD(0xC0, 0x61), |
| 154 | INIT_DCS_CMD(0xC1, 0x97), |
| 155 | INIT_DCS_CMD(0xC2, 0xB2), |
| 156 | INIT_DCS_CMD(0xC3, 0xCD), |
| 157 | INIT_DCS_CMD(0xC4, 0xD9), |
| 158 | INIT_DCS_CMD(0xC5, 0xE7), |
| 159 | INIT_DCS_CMD(0xC6, 0xF4), |
| 160 | INIT_DCS_CMD(0xC7, 0xFA), |
| 161 | INIT_DCS_CMD(0xC8, 0xFC), |
| 162 | INIT_DCS_CMD(0xC9, 0x00), |
| 163 | INIT_DCS_CMD(0xCA, 0x00), |
| 164 | INIT_DCS_CMD(0xCB, 0x16), |
| 165 | INIT_DCS_CMD(0xCC, 0xAF), |
| 166 | INIT_DCS_CMD(0xCD, 0xFF), |
| 167 | INIT_DCS_CMD(0xCE, 0xFF), |
| 168 | INIT_DCS_CMD(0xB0, 0x08), |
| 169 | INIT_DCS_CMD(0xB1, 0x04), |
| 170 | INIT_DCS_CMD(0xB2, 0x05), |
| 171 | INIT_DCS_CMD(0xB3, 0x11), |
| 172 | INIT_DCS_CMD(0xB4, 0x24), |
| 173 | INIT_DCS_CMD(0xB5, 0x39), |
| 174 | INIT_DCS_CMD(0xB6, 0x4F), |
| 175 | INIT_DCS_CMD(0xB7, 0x72), |
| 176 | INIT_DCS_CMD(0xB8, 0x98), |
| 177 | INIT_DCS_CMD(0xB9, 0xDC), |
| 178 | INIT_DCS_CMD(0xBA, 0x23), |
| 179 | INIT_DCS_CMD(0xBB, 0xA6), |
| 180 | INIT_DCS_CMD(0xBC, 0x2C), |
| 181 | INIT_DCS_CMD(0xBD, 0x30), |
| 182 | INIT_DCS_CMD(0xBE, 0xAA), |
| 183 | INIT_DCS_CMD(0xBF, 0x26), |
| 184 | INIT_DCS_CMD(0xC0, 0x62), |
| 185 | INIT_DCS_CMD(0xC1, 0x9B), |
| 186 | INIT_DCS_CMD(0xC2, 0xB5), |
| 187 | INIT_DCS_CMD(0xC3, 0xCF), |
| 188 | INIT_DCS_CMD(0xC4, 0xDB), |
| 189 | INIT_DCS_CMD(0xC5, 0xE8), |
| 190 | INIT_DCS_CMD(0xC6, 0xF5), |
| 191 | INIT_DCS_CMD(0xC7, 0xFA), |
| 192 | INIT_DCS_CMD(0xC8, 0xFC), |
| 193 | INIT_DCS_CMD(0xC9, 0x00), |
| 194 | INIT_DCS_CMD(0xCA, 0x00), |
| 195 | INIT_DCS_CMD(0xCB, 0x16), |
| 196 | INIT_DCS_CMD(0xCC, 0xAF), |
| 197 | INIT_DCS_CMD(0xCD, 0xFF), |
| 198 | INIT_DCS_CMD(0xCE, 0xFF), |
| 199 | INIT_DCS_CMD(0xB0, 0x09), |
| 200 | INIT_DCS_CMD(0xB1, 0x04), |
| 201 | INIT_DCS_CMD(0xB2, 0x02), |
| 202 | INIT_DCS_CMD(0xB3, 0x16), |
| 203 | INIT_DCS_CMD(0xB4, 0x24), |
| 204 | INIT_DCS_CMD(0xB5, 0x3B), |
| 205 | INIT_DCS_CMD(0xB6, 0x4F), |
| 206 | INIT_DCS_CMD(0xB7, 0x73), |
| 207 | INIT_DCS_CMD(0xB8, 0x99), |
| 208 | INIT_DCS_CMD(0xB9, 0xE0), |
| 209 | INIT_DCS_CMD(0xBA, 0x26), |
| 210 | INIT_DCS_CMD(0xBB, 0xAD), |
| 211 | INIT_DCS_CMD(0xBC, 0x36), |
| 212 | INIT_DCS_CMD(0xBD, 0x3A), |
| 213 | INIT_DCS_CMD(0xBE, 0xAE), |
| 214 | INIT_DCS_CMD(0xBF, 0x2A), |
| 215 | INIT_DCS_CMD(0xC0, 0x66), |
| 216 | INIT_DCS_CMD(0xC1, 0x9E), |
| 217 | INIT_DCS_CMD(0xC2, 0xB8), |
| 218 | INIT_DCS_CMD(0xC3, 0xD1), |
| 219 | INIT_DCS_CMD(0xC4, 0xDD), |
| 220 | INIT_DCS_CMD(0xC5, 0xE9), |
| 221 | INIT_DCS_CMD(0xC6, 0xF6), |
| 222 | INIT_DCS_CMD(0xC7, 0xFA), |
| 223 | INIT_DCS_CMD(0xC8, 0xFC), |
| 224 | INIT_DCS_CMD(0xC9, 0x00), |
| 225 | INIT_DCS_CMD(0xCA, 0x00), |
| 226 | INIT_DCS_CMD(0xCB, 0x16), |
| 227 | INIT_DCS_CMD(0xCC, 0xAF), |
| 228 | INIT_DCS_CMD(0xCD, 0xFF), |
| 229 | INIT_DCS_CMD(0xCE, 0xFF), |
| 230 | INIT_DCS_CMD(0xB0, 0x0A), |
| 231 | INIT_DCS_CMD(0xB1, 0x00), |
| 232 | INIT_DCS_CMD(0xB2, 0x02), |
| 233 | INIT_DCS_CMD(0xB3, 0x0F), |
| 234 | INIT_DCS_CMD(0xB4, 0x25), |
| 235 | INIT_DCS_CMD(0xB5, 0x39), |
| 236 | INIT_DCS_CMD(0xB6, 0x4E), |
| 237 | INIT_DCS_CMD(0xB7, 0x72), |
| 238 | INIT_DCS_CMD(0xB8, 0x97), |
| 239 | INIT_DCS_CMD(0xB9, 0xDC), |
| 240 | INIT_DCS_CMD(0xBA, 0x22), |
| 241 | INIT_DCS_CMD(0xBB, 0xA4), |
| 242 | INIT_DCS_CMD(0xBC, 0x2B), |
| 243 | INIT_DCS_CMD(0xBD, 0x2F), |
| 244 | INIT_DCS_CMD(0xBE, 0xA9), |
| 245 | INIT_DCS_CMD(0xBF, 0x25), |
| 246 | INIT_DCS_CMD(0xC0, 0x61), |
| 247 | INIT_DCS_CMD(0xC1, 0x97), |
| 248 | INIT_DCS_CMD(0xC2, 0xB2), |
| 249 | INIT_DCS_CMD(0xC3, 0xCD), |
| 250 | INIT_DCS_CMD(0xC4, 0xD9), |
| 251 | INIT_DCS_CMD(0xC5, 0xE7), |
| 252 | INIT_DCS_CMD(0xC6, 0xF4), |
| 253 | INIT_DCS_CMD(0xC7, 0xFA), |
| 254 | INIT_DCS_CMD(0xC8, 0xFC), |
| 255 | INIT_DCS_CMD(0xC9, 0x00), |
| 256 | INIT_DCS_CMD(0xCA, 0x00), |
| 257 | INIT_DCS_CMD(0xCB, 0x16), |
| 258 | INIT_DCS_CMD(0xCC, 0xAF), |
| 259 | INIT_DCS_CMD(0xCD, 0xFF), |
| 260 | INIT_DCS_CMD(0xCE, 0xFF), |
| 261 | INIT_DCS_CMD(0xB0, 0x0B), |
| 262 | INIT_DCS_CMD(0xB1, 0x04), |
| 263 | INIT_DCS_CMD(0xB2, 0x05), |
| 264 | INIT_DCS_CMD(0xB3, 0x11), |
| 265 | INIT_DCS_CMD(0xB4, 0x24), |
| 266 | INIT_DCS_CMD(0xB5, 0x39), |
| 267 | INIT_DCS_CMD(0xB6, 0x4F), |
| 268 | INIT_DCS_CMD(0xB7, 0x72), |
| 269 | INIT_DCS_CMD(0xB8, 0x98), |
| 270 | INIT_DCS_CMD(0xB9, 0xDC), |
| 271 | INIT_DCS_CMD(0xBA, 0x23), |
| 272 | INIT_DCS_CMD(0xBB, 0xA6), |
| 273 | INIT_DCS_CMD(0xBC, 0x2C), |
| 274 | INIT_DCS_CMD(0xBD, 0x30), |
| 275 | INIT_DCS_CMD(0xBE, 0xAA), |
| 276 | INIT_DCS_CMD(0xBF, 0x26), |
| 277 | INIT_DCS_CMD(0xC0, 0x62), |
| 278 | INIT_DCS_CMD(0xC1, 0x9B), |
| 279 | INIT_DCS_CMD(0xC2, 0xB5), |
| 280 | INIT_DCS_CMD(0xC3, 0xCF), |
| 281 | INIT_DCS_CMD(0xC4, 0xDB), |
| 282 | INIT_DCS_CMD(0xC5, 0xE8), |
| 283 | INIT_DCS_CMD(0xC6, 0xF5), |
| 284 | INIT_DCS_CMD(0xC7, 0xFA), |
| 285 | INIT_DCS_CMD(0xC8, 0xFC), |
| 286 | INIT_DCS_CMD(0xC9, 0x00), |
| 287 | INIT_DCS_CMD(0xCA, 0x00), |
| 288 | INIT_DCS_CMD(0xCB, 0x16), |
| 289 | INIT_DCS_CMD(0xCC, 0xAF), |
| 290 | INIT_DCS_CMD(0xCD, 0xFF), |
| 291 | INIT_DCS_CMD(0xCE, 0xFF), |
| 292 | INIT_DCS_CMD(0xB0, 0x0C), |
| 293 | INIT_DCS_CMD(0xB1, 0x04), |
| 294 | INIT_DCS_CMD(0xB2, 0x02), |
| 295 | INIT_DCS_CMD(0xB3, 0x16), |
| 296 | INIT_DCS_CMD(0xB4, 0x24), |
| 297 | INIT_DCS_CMD(0xB5, 0x3B), |
| 298 | INIT_DCS_CMD(0xB6, 0x4F), |
| 299 | INIT_DCS_CMD(0xB7, 0x73), |
| 300 | INIT_DCS_CMD(0xB8, 0x99), |
| 301 | INIT_DCS_CMD(0xB9, 0xE0), |
| 302 | INIT_DCS_CMD(0xBA, 0x26), |
| 303 | INIT_DCS_CMD(0xBB, 0xAD), |
| 304 | INIT_DCS_CMD(0xBC, 0x36), |
| 305 | INIT_DCS_CMD(0xBD, 0x3A), |
| 306 | INIT_DCS_CMD(0xBE, 0xAE), |
| 307 | INIT_DCS_CMD(0xBF, 0x2A), |
| 308 | INIT_DCS_CMD(0xC0, 0x66), |
| 309 | INIT_DCS_CMD(0xC1, 0x9E), |
| 310 | INIT_DCS_CMD(0xC2, 0xB8), |
| 311 | INIT_DCS_CMD(0xC3, 0xD1), |
| 312 | INIT_DCS_CMD(0xC4, 0xDD), |
| 313 | INIT_DCS_CMD(0xC5, 0xE9), |
| 314 | INIT_DCS_CMD(0xC6, 0xF6), |
| 315 | INIT_DCS_CMD(0xC7, 0xFA), |
| 316 | INIT_DCS_CMD(0xC8, 0xFC), |
| 317 | INIT_DCS_CMD(0xC9, 0x00), |
| 318 | INIT_DCS_CMD(0xCA, 0x00), |
| 319 | INIT_DCS_CMD(0xCB, 0x16), |
| 320 | INIT_DCS_CMD(0xCC, 0xAF), |
| 321 | INIT_DCS_CMD(0xCD, 0xFF), |
| 322 | INIT_DCS_CMD(0xCE, 0xFF), |
| 323 | INIT_DCS_CMD(0xB0, 0x00), |
| 324 | INIT_DCS_CMD(0xB3, 0x08), |
| 325 | INIT_DCS_CMD(0xB0, 0x04), |
| 326 | INIT_DCS_CMD(0xB8, 0x68), |
| 327 | INIT_DELAY_CMD(150), |
| 328 | INIT_END_CMD, |
| 329 | }, |
| 330 | }; |