| Martin Roth | 1a3de8e | 2022-10-06 15:57:21 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | /* TODO: Update for Morgana */ |
| 4 | |
| 5 | Device(PCI0) { |
| 6 | Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ |
| 7 | Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ |
| 8 | External(TOM1, IntObj) /* Generated by root_complex.c */ |
| 9 | |
| 10 | Method(_BBN, 0, NotSerialized) { |
| Felix Singer | 9df60d3 | 2022-12-26 09:43:07 +0100 | [diff] [blame^] | 11 | Return(0) /* Bus number = 0 */ |
| Martin Roth | 1a3de8e | 2022-10-06 15:57:21 -0600 | [diff] [blame] | 12 | } |
| 13 | |
| 14 | Method(_STA, 0, NotSerialized) { |
| 15 | Return(0x0B) /* Status is visible */ |
| 16 | } |
| 17 | |
| 18 | /* Operating System Capabilities Method */ |
| 19 | Method(_OSC, 4) { |
| 20 | CreateDWordField(Arg3, 0, CDW1) /* Capabilities dword 1 */ |
| 21 | |
| 22 | /* Check for proper PCI/PCIe UUID */ |
| 23 | If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { |
| 24 | /* Let OS control everything */ |
| 25 | Return (Arg3) |
| 26 | } Else { |
| 27 | CDW1 |= 4 /* Unrecognized UUID */ |
| 28 | Return (Arg3) |
| 29 | } |
| 30 | } |
| 31 | Name(CRES, ResourceTemplate() { |
| 32 | WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 33 | 0x0000, /* address granularity */ |
| 34 | 0x0000, /* range minimum */ |
| 35 | 0x00ff, /* range maximum */ |
| 36 | 0x0000, /* translation */ |
| 37 | 0x0100, /* length */ |
| 38 | ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */ |
| 39 | |
| 40 | IO(Decode16, 0x0cf8, 0x0cf8, 1, 8) |
| 41 | |
| 42 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 43 | 0x0000, /* address granularity */ |
| 44 | 0x0000, /* range minimum */ |
| 45 | 0x0cf7, /* range maximum */ |
| 46 | 0x0000, /* translation */ |
| 47 | 0x0cf8 /* length */ |
| 48 | ) |
| 49 | |
| 50 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 51 | 0x0000, /* address granularity */ |
| 52 | 0x0d00, /* range minimum */ |
| 53 | 0xffff, /* range maximum */ |
| 54 | 0x0000, /* translation */ |
| 55 | 0xf300 /* length */ |
| 56 | ) |
| 57 | |
| 58 | Memory32Fixed(READONLY, 0x000a0000, 0x00020000, VGAM) /* VGA memory space */ |
| 59 | Memory32Fixed(READONLY, 0x000c0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */ |
| 60 | |
| 61 | /* memory space for PCI BARs below 4GB */ |
| 62 | Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) |
| 63 | }) |
| 64 | |
| 65 | Method(_CRS, 0) { |
| 66 | CreateDWordField(CRES, ^MMIO._BAS, MM1B) |
| 67 | CreateDWordField(CRES, ^MMIO._LEN, MM1L) |
| 68 | |
| 69 | /* Declare memory between TOM1 and MMCONF as available for PCI MMIO. */ |
| 70 | MM1B = TOM1 |
| 71 | Local0 = CONFIG_ECAM_MMCONF_BASE_ADDRESS |
| 72 | Local0 -= TOM1 |
| 73 | MM1L = Local0 |
| 74 | |
| 75 | CreateWordField(CRES, ^PSB0._MAX, BMAX) |
| 76 | CreateWordField(CRES, ^PSB0._LEN, BLEN) |
| 77 | BMAX = CONFIG_ECAM_MMCONF_BUS_NUMBER - 1 |
| 78 | BLEN = CONFIG_ECAM_MMCONF_BUS_NUMBER |
| 79 | |
| 80 | Return(CRES) /* note to change the Name buffer */ |
| 81 | } /* end of Method(_SB.PCI0._CRS) */ |
| 82 | |
| 83 | /* 0:14.3 - LPC */ |
| 84 | #include <soc/amd/common/acpi/lpc.asl> |
| 85 | |
| 86 | } /* End PCI0 scope */ |