blob: 820bd4540e7c0edb6b3ffb69bcc8cbabeb934a86 [file] [log] [blame]
Andrey Petrov9de55cc2016-02-25 14:19:07 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2015 Intel Corp.
5 * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <arch/cpu.h>
14#include <console/console.h>
15#include <fsp/api.h>
16#include <fsp/util.h>
17#include <string.h>
18
19struct fsp_notify_params {
20 enum fsp_notify_phase phase;
21};
22
23typedef asmlinkage enum fsp_status (*fsp_notify_fn)
24 (struct fsp_notify_params *);
25
26enum fsp_status fsp_notify(enum fsp_notify_phase phase)
27{
28 fsp_notify_fn fspnotify;
29 struct fsp_notify_params notify_params = { .phase = phase };
30
31 if (!fsps_hdr.silicon_init_entry_offset)
32 return FSP_NOT_FOUND;
33
34 fspnotify = (void*) (fsps_hdr.image_base +
35 fsps_hdr.notify_phase_entry_offset);
36
37 printk(BIOS_DEBUG, "FspNotify %x\n", (uint32_t) phase);
38
39 return fspnotify(&notify_params);
40}