blob: 38a777c2082255584d01e64e21fe83210effd673 [file] [log] [blame]
Yidi Lin3d7b6062015-07-31 17:10:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <arch/io.h>
21#include <bootblock_common.h>
22#include <delay.h>
Biao Huang9d48e172015-07-31 17:10:56 +080023#include <soc/gpio.h>
Yidi Lin3d7b6062015-07-31 17:10:40 +080024#include <soc/pericfg.h>
Biao Huang9d48e172015-07-31 17:10:56 +080025#include <soc/pinmux.h>
26
27static void i2c_set_gpio_pinmux(void)
28{
29 gpio_set_mode(PAD_SDA1, PAD_SDA1_FUNC_SDA1);
30 gpio_set_mode(PAD_SCL1, PAD_SCL1_FUNC_SCL1);
31 gpio_set_mode(PAD_SDA4, PAD_SDA4_FUNC_SDA4);
32 gpio_set_mode(PAD_SCL4, PAD_SCL4_FUNC_SCL4);
33}
Yidi Lin3d7b6062015-07-31 17:10:40 +080034
35void bootblock_mainboard_early_init(void)
36{
37 /* Clear UART0 power down signal */
38 clrbits_le32(&mt8173_pericfg->pdn0_set, PERICFG_UART0_PDN);
39}
40
41void bootblock_mainboard_init(void)
42{
Biao Huang9d48e172015-07-31 17:10:56 +080043 /* adjust gpio params when external voltage is 1.8V */
44 gpio_init(GPIO_EINT_1P8V);
45
46 /* set i2c related gpio */
47 i2c_set_gpio_pinmux();
Yidi Lin3d7b6062015-07-31 17:10:40 +080048}