| Matt DeVillier | 9be3f5d | 2017-01-16 17:32:38 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; version 2 of the License. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef VARIANT_H |
| 15 | #define VARIANT_H |
| 16 | |
| 17 | /* |
| 18 | * RAM_ID[2:0] are on GPIO_SSUS[39:37] |
| 19 | * 0b000 - 2GiB total - 1 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz |
| 20 | * 0b001 - 2GiB total - 1 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz |
| 21 | * 0b010 - 4GiB total - 2 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz |
| 22 | * 0b011 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz |
| 23 | */ |
| 24 | |
| 25 | static const uint32_t dual_channel_config = |
| 26 | (1 << 2) | (1 << 3); |
| 27 | |
| 28 | #define SPD_SIZE 256 |
| 29 | #define GPIO_SSUS_37_PAD 57 |
| 30 | #define GPIO_SSUS_38_PAD 50 |
| 31 | #define GPIO_SSUS_39_PAD 58 |
| 32 | |
| 33 | #endif |