| Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Kyösti Mälkki | a62191b | 2015-05-27 07:58:22 +0300 | [diff] [blame] | 2 | |
| 3 | #ifndef _AMD_00730F01_PCI_DEVS_H_ |
| 4 | #define _AMD_00730F01_PCI_DEVS_H_ |
| 5 | |
| Kyösti Mälkki | a62191b | 2015-05-27 07:58:22 +0300 | [diff] [blame] | 6 | /* Graphics and Display */ |
| 7 | #define GFX_DEV 0x1 |
| 8 | #define GFX_FUNC 0 |
| Elyes Haouas | 693f7c1 | 2022-07-16 09:38:17 +0200 | [diff] [blame] | 9 | #define GFX_DEVFN PCI_DEVFN(GFX_DEV, GFX_FUNC) |
| Kyösti Mälkki | a62191b | 2015-05-27 07:58:22 +0300 | [diff] [blame] | 10 | |
| 11 | /* Internal Audio controller */ |
| 12 | #define ACTL_DEV 0x1 |
| 13 | #define ACTL_FUNC 1 |
| Elyes Haouas | 693f7c1 | 2022-07-16 09:38:17 +0200 | [diff] [blame] | 14 | #define ACTL_DEVFN PCI_DEVFN(ACTL_DEV, ACTL_FUNC) |
| Kyösti Mälkki | a62191b | 2015-05-27 07:58:22 +0300 | [diff] [blame] | 15 | |
| 16 | /* PCIe Ports */ |
| 17 | #define NB_PCIE_PORT2_DEV 0x2 |
| 18 | #define NB_PCIE_FUNC0 0 |
| 19 | #define NB_PCIE_FUNC1 1 |
| 20 | #define NB_PCIE_FUNC2 2 |
| 21 | #define NB_PCIE_FUNC3 3 |
| 22 | #define NB_PCIE_FUNC4 4 |
| 23 | #define NB_PCIE_FUNC5 5 |
| Elyes Haouas | 693f7c1 | 2022-07-16 09:38:17 +0200 | [diff] [blame] | 24 | #define NB_PCIE_PORT0_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV, NB_PCIE_FUNC0) |
| 25 | #define NB_PCIE_PORT1_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV, NB_PCIE_FUNC1) |
| 26 | #define NB_PCIE_PORT2_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV, NB_PCIE_FUNC2) |
| 27 | #define NB_PCIE_PORT3_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV, NB_PCIE_FUNC3) |
| 28 | #define NB_PCIE_PORT4_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV, NB_PCIE_FUNC4) |
| 29 | #define NB_PCIE_PORT5_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV, NB_PCIE_FUNC5) |
| Kyösti Mälkki | a62191b | 2015-05-27 07:58:22 +0300 | [diff] [blame] | 30 | |
| 31 | #endif /* _AMD_00730F01_PCI_DEVS_H_ */ |