| Zheng Bao | adac6f4 | 2021-01-29 18:10:00 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| Elyes Haouas | 9aebc19 | 2023-01-30 20:02:03 +0100 | [diff] [blame^] | 3 | #include <gpio.h> |
| Zheng Bao | adac6f4 | 2021-01-29 18:10:00 +0800 | [diff] [blame] | 4 | #include "gpio.h" |
| 5 | |
| 6 | /* GPIO pins used by coreboot should be initialized in bootblock */ |
| 7 | |
| 8 | static const struct soc_amd_gpio gpio_set_stage_reset[] = { |
| Zheng Bao | 16e1fd5 | 2021-03-16 17:33:46 +0800 | [diff] [blame] | 9 | PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE), |
| 10 | PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE), |
| 11 | PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), |
| 12 | PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), |
| Zheng Bao | adac6f4 | 2021-01-29 18:10:00 +0800 | [diff] [blame] | 13 | }; |
| 14 | |
| 15 | void mainboard_program_early_gpios(void) |
| 16 | { |
| Felix Held | 7011fa1 | 2021-09-22 16:36:12 +0200 | [diff] [blame] | 17 | gpio_configure_pads(gpio_set_stage_reset, ARRAY_SIZE(gpio_set_stage_reset)); |
| Zheng Bao | adac6f4 | 2021-01-29 18:10:00 +0800 | [diff] [blame] | 18 | } |