Martin Roth | 3c963d9 | 2022-10-06 16:29:07 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Elyes Haouas | 9aebc19 | 2023-01-30 20:02:03 +0100 | [diff] [blame^] | 3 | #include <gpio.h> |
Martin Roth | 3c963d9 | 2022-10-06 16:29:07 -0600 | [diff] [blame] | 4 | #include "gpio.h" |
| 5 | |
Martin Roth | 3c963d9 | 2022-10-06 16:29:07 -0600 | [diff] [blame] | 6 | /* GPIO pins used by coreboot should be initialized in bootblock */ |
| 7 | |
| 8 | static const struct soc_amd_gpio gpio_set_stage_reset[] = { |
Fred Reitberger | 98d0574 | 2022-11-09 15:07:12 -0500 | [diff] [blame] | 9 | /* TPM CS */ |
| 10 | PAD_NF(GPIO_29, SPI_TPM_CS_L, PULL_NONE), |
| 11 | /* ESPI_CS_L */ |
| 12 | PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), |
| 13 | /* ESPI_SOC_CLK */ |
| 14 | PAD_NF(GPIO_77, SPI1_CLK, PULL_NONE), |
| 15 | /* ESPI_DATA0 */ |
| 16 | PAD_NF(GPIO_81, SPI1_DAT0, PULL_NONE), |
| 17 | /* ESPI_DATA1 */ |
| 18 | PAD_NF(GPIO_80, SPI1_DAT1, PULL_NONE), |
| 19 | /* ESPI_DATA2 */ |
| 20 | PAD_NF(GPIO_68, SPI1_DAT2, PULL_NONE), |
| 21 | /* ESPI_DATA3 */ |
| 22 | PAD_NF(GPIO_69, SPI1_DAT3, PULL_NONE), |
| 23 | /* ESPI_ALERT_L */ |
| 24 | PAD_NF(GPIO_22, ESPI_ALERT_D1, PULL_NONE), |
| 25 | /* TPM IRQ */ |
Fred Reitberger | f68bd12 | 2022-12-02 16:03:05 -0500 | [diff] [blame] | 26 | PAD_INT(GPIO_130, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), |
Fred Reitberger | 98d0574 | 2022-11-09 15:07:12 -0500 | [diff] [blame] | 27 | /* SPI_ROM_REQ */ |
| 28 | PAD_NF(GPIO_67, SPI_ROM_REQ, PULL_NONE), |
| 29 | /* SPI_ROM_GNT */ |
| 30 | PAD_NF(GPIO_76, SPI_ROM_GNT, PULL_NONE), |
| 31 | /* KBRST_L */ |
| 32 | PAD_NF(GPIO_21, KBRST_L, PULL_NONE), |
| 33 | |
| 34 | /* Deassert PCIe Reset lines */ |
| 35 | /* PCIE_RST0_L */ |
| 36 | PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH), |
| 37 | /* PCIE_RST1_L */ |
| 38 | PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH), |
| 39 | |
| 40 | /* Enable UART 2 */ |
| 41 | /* UART2_RXD */ |
| 42 | PAD_NF(GPIO_136, UART2_RXD, PULL_NONE), |
| 43 | /* UART2_TXD */ |
| 44 | PAD_NF(GPIO_138, UART2_TXD, PULL_NONE), |
| 45 | /* Enable UART 0 */ |
| 46 | /* UART0_RXD */ |
| 47 | PAD_NF(GPIO_141, UART0_RXD, PULL_NONE), |
| 48 | /* UART0_TXD */ |
| 49 | PAD_NF(GPIO_143, UART0_TXD, PULL_NONE), |
| 50 | /* FANOUT0 */ |
| 51 | PAD_NF(GPIO_85, FANOUT0, PULL_NONE), |
| 52 | |
| 53 | /* I2C0 SCL */ |
| 54 | PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), |
| 55 | /* I2C0 SDA */ |
| 56 | PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), |
| 57 | /* I2C1 SCL */ |
| 58 | PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), |
| 59 | /* I2C1 SDA */ |
| 60 | PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), |
| 61 | /* I2C2_SCL */ |
| 62 | PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE), |
| 63 | /* I2C2_SDA */ |
| 64 | PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE), |
| 65 | /* I2C3_SCL */ |
| 66 | PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), |
| 67 | /* I2C3_SDA */ |
| 68 | PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), |
Martin Roth | 3c963d9 | 2022-10-06 16:29:07 -0600 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | void mainboard_program_early_gpios(void) |
| 72 | { |
| 73 | gpio_configure_pads(gpio_set_stage_reset, ARRAY_SIZE(gpio_set_stage_reset)); |
| 74 | } |