| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2011 Google Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
| 20 | config SOUTHBRIDGE_INTEL_BD82X6X |
| 21 | bool |
| 22 | |
| 23 | config SOUTHBRIDGE_INTEL_C216 |
| 24 | bool |
| 25 | |
| 26 | if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216 |
| 27 | |
| 28 | config SOUTH_BRIDGE_OPTIONS # dummy |
| 29 | def_bool y |
| 30 | select IOAPIC |
| 31 | select HAVE_HARD_RESET |
| 32 | select HAVE_USBDEBUG |
| 33 | select USE_WATCHDOG_ON_BOOT |
| 34 | select PCIEXP_ASPM |
| 35 | select PCIEXP_COMMON_CLOCK |
| Stefan Reinauer | 1c56d9b | 2012-05-10 11:27:32 -0700 | [diff] [blame] | 36 | select SPI_FLASH |
| 37 | select SPI_FLASH_NO_FAST_READ |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 38 | |
| 39 | config EHCI_BAR |
| 40 | hex |
| 41 | default 0xfef00000 |
| 42 | |
| 43 | config EHCI_DEBUG_OFFSET |
| 44 | hex |
| 45 | default 0xa0 |
| 46 | |
| 47 | config BOOTBLOCK_SOUTHBRIDGE_INIT |
| 48 | string |
| 49 | default "southbridge/intel/bd82x6x/bootblock.c" |
| 50 | |
| 51 | config SERIRQ_CONTINUOUS_MODE |
| 52 | bool |
| 53 | default n |
| 54 | help |
| 55 | If you set this option to y, the serial IRQ machine will be |
| 56 | operated in continuous mode. |
| 57 | |
| Patrick Georgi | 9aeb694 | 2012-10-05 21:54:38 +0200 | [diff] [blame^] | 58 | config HPET_MIN_TICKS |
| 59 | hex |
| 60 | default 0x80 |
| 61 | |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 62 | endif |