Uwe Hermann | 6798b47 | 2010-10-07 16:24:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Uwe Hermann | 42b1c43 | 2010-12-09 18:09:14 +0000 | [diff] [blame] | 4 | * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> |
Uwe Hermann | 6798b47 | 2010-10-07 16:24:28 +0000 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame] | 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Uwe Hermann | 6798b47 | 2010-10-07 16:24:28 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
Uwe Hermann | 42b1c43 | 2010-12-09 18:09:14 +0000 | [diff] [blame] | 21 | #include <stdint.h> |
| 22 | #include <arch/io.h> |
Uwe Hermann | 42b1c43 | 2010-12-09 18:09:14 +0000 | [diff] [blame] | 23 | #include <device/pci_ids.h> |
| 24 | #include "i82371eb.h" |
| 25 | |
| 26 | static void i82371eb_enable_rom(void) |
| 27 | { |
| 28 | u16 reg16; |
Edward O'Callaghan | 9a817ef | 2014-10-26 10:12:15 +1100 | [diff] [blame^] | 29 | pci_devfn_t dev; |
Uwe Hermann | 42b1c43 | 2010-12-09 18:09:14 +0000 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * Note: The Intel 82371AB/EB/MB ISA device can be on different |
| 33 | * PCI bus:device.function locations on different boards. |
| 34 | * Examples we encountered: 00:07.0, 00:04.0, or 00:14.0. |
| 35 | * But scanning for the PCI IDs (instead of hardcoding |
| 36 | * bus/device/function numbers) works on all boards. |
| 37 | */ |
| 38 | dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, |
| 39 | PCI_DEVICE_ID_INTEL_82371AB_ISA), 0); |
| 40 | |
| 41 | /* Enable access to the whole ROM, disable ROM write access. */ |
| 42 | reg16 = pci_read_config16(dev, XBCS); |
| 43 | reg16 |= LOWER_BIOS_ENABLE; |
| 44 | reg16 |= EXT_BIOS_ENABLE; |
| 45 | reg16 |= EXT_BIOS_ENABLE_1MB; |
| 46 | reg16 &= ~(WRITE_PROTECT_ENABLE); /* Disable ROM write access. */ |
| 47 | pci_write_config16(dev, XBCS, reg16); |
| 48 | } |
Uwe Hermann | 6798b47 | 2010-10-07 16:24:28 +0000 | [diff] [blame] | 49 | |
| 50 | static void bootblock_southbridge_init(void) |
| 51 | { |
| 52 | i82371eb_enable_rom(); |
| 53 | } |