| Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Google, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <arch/io.h> |
| 21 | #include <baytrail/iosf.h> |
| 22 | |
| 23 | static void bootblock_cpu_init(void) |
| 24 | { |
| 25 | uint32_t reg; |
| 26 | |
| 27 | /* Set up the MMCONF range. The register lives in the BUNIT. The |
| 28 | * IO variant of the config access needs to be used initially to |
| 29 | * properly configure as the IOSF access registers live in PCI |
| 30 | * config space. */ |
| 31 | reg = 0; |
| 32 | /* Clear the extended register. */ |
| 33 | pci_io_write_config32(IOSF_PCI_DEV, MCRX_REG, reg); |
| 34 | reg = CONFIG_MMCONF_BASE_ADDRESS | 1; |
| 35 | pci_io_write_config32(IOSF_PCI_DEV, MDR_REG, reg); |
| 36 | reg = IOSF_OPCODE(IOSF_OP_WRITE_BUNIT) | IOSF_PORT(IOSF_PORT_BUNIT) | |
| 37 | IOSF_REG(BUNIT_MMCONF_REG) | IOSF_BYTE_EN; |
| 38 | pci_io_write_config32(IOSF_PCI_DEV, MCR_REG, reg); |
| 39 | } |