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review.coreboot.org / coreboot / 9a458e4e58edbfc154dce007961514b5c31cf7aa / . / src / vendorcode / amd / agesa / f15tn / Proc / Mem / NB / TN / mnregtn.c
blob: 5bf1093c6f75e458eaacadca8c6397c18a99e93e [file] [log] [blame]
zbao7d94cf92012-07-02 14:19:14 +0800[diff] [blame]1/* $NoKeywords:$ */
2/**
3 * @file
4 *
5 * mnregtn.c
6 *
7 * Common Northbridge register related functions for TN
8 *
9 * @xrefitem bom "File Content Label" "Release Content"
10 * @e project: AGESA
11 * @e sub-project: (Mem/NB/TN)
12 * @e \$Revision: 64574 $ @e \$Date: 2012-01-25 01:01:51 -0600 (Wed, 25 Jan 2012) $
13 *
14 **/
15/*****************************************************************************
16*
Siyuan Wang641f00c2013-06-08 11:50:55 +0800[diff] [blame]17 * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
18 * All rights reserved.
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
zbao7d94cf92012-07-02 14:19:14 +0800[diff] [blame]41* ***************************************************************************
42*
43*/
44
45/*
46 *----------------------------------------------------------------------------
47 * MODULES USED
48 *
49 *----------------------------------------------------------------------------
50 */
51
52#include "AGESA.h"
53#include "AdvancedApi.h"
54#include "amdlib.h"
55#include "Ids.h"
56#include "Gnb.h"
57#include "GnbCommonLib.h"
58#include "GnbRegistersTN.h"
59#include "GnbRegisterAccTN.h"
60#include "OptionMemory.h"
61#include "mm.h"
62#include "mn.h"
63#include "mntn.h"
64#include "merrhdl.h"
65#include "cpuRegisters.h"
66#include "cpuFamRegisters.h"
67#include "cpuFamilyTranslation.h"
68#include "Filecode.h"
69CODE_GROUP (G3_DXE)
70RDATA_GROUP (G3_DXE)
71
72
73#define FILECODE PROC_MEM_NB_TN_MNREGTN_FILECODE
74
75/*----------------------------------------------------------------------------
76 * DEFINITIONS AND MACROS
77 *
78 *----------------------------------------------------------------------------
79 */
80#define PHY_DIRECT_ADDRESS_MASK 0x0D000000ul
81
82STATIC CONST UINT8 InstancesPerTypeTN[8] = {8, 3, 1, 2, 2, 0, 1, 1};
83
84/*----------------------------------------------------------------------------
85 * TYPEDEFS AND STRUCTURES
86 *
87 *----------------------------------------------------------------------------
88 */
89
90/*----------------------------------------------------------------------------
91 * PROTOTYPES OF LOCAL FUNCTIONS
92 *
93 *----------------------------------------------------------------------------
94 */
95
96/*----------------------------------------------------------------------------
97 * EXPORTED FUNCTIONS
98 *
99 *----------------------------------------------------------------------------
100 */
101/*-----------------------------------------------------------------------------*/
102/**
103 * MemNIsIdSupportedTn
104 * This function matches the CPU_LOGICAL_ID with certain criteria to
105 * determine if it is supported by this NBBlock.
106 *
107 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
108 * @param[in] *LogicalIdPtr - Pointer to the CPU_LOGICAL_ID
109 *
110 * @return TRUE - This node is a TN.
111 * @return FALSE - This node is not a TN.
112 *
113 */
114BOOLEAN
115MemNIsIdSupportedTN (
116 IN OUT MEM_NB_BLOCK *NBPtr,
117 IN CPU_LOGICAL_ID *LogicalIdPtr
118 )
119{
120 if (((LogicalIdPtr->Family & AMD_FAMILY_15_TN) != 0)
121 && ((LogicalIdPtr->Revision & (AMD_F15_OR_ALL | AMD_F15_TN_ALL | 0x0000000000100000ull) ) != 0)) {
122 return TRUE;
123 } else {
124 return FALSE;
125 }
126}
127
128/*----------------------------------------------------------------------------
129 * LOCAL FUNCTIONS
130 *
131 *----------------------------------------------------------------------------*/
132
133/* -----------------------------------------------------------------------------*/
134/**
135 *
136 *
137 * This function gets or sets a value to a bit field in a PCI register.
138 *
139 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
140 * @param[in] FieldName - Bit Field to be programmed
141 * @param[in] Field - Value to be programmed
142 * @param[in] IsSet - Indicates if the function will set or get
143 *
144 * @return value read, if the function is used as a "get"
145 */
146
147UINT32
148MemNCmnGetSetFieldTN (
149 IN OUT MEM_NB_BLOCK *NBPtr,
150 IN UINT8 IsSet,
151 IN BIT_FIELD_NAME FieldName,
152 IN UINT32 Field
153 )
154{
155 TSEFO Address;
156 PCI_ADDR PciAddr;
157 UINT8 Type;
158 UINT8 IsLinked;
159 UINT32 Value;
160 UINT32 Highbit;
161 UINT32 Lowbit;
162 UINT32 Mask;
163 UINT8 IsPhyDirectAccess;
164 UINT8 IsWholeRegAccess;
165 UINT8 NumOfInstances;
166 UINT8 Instance;
167 UINT8 IsMultipleMPstate;
168
169 Value = 0;
170 if (FieldName == BFDctAccessDone) {
171 // No need to poll DctAccessDone for TN due to enhancement in phy
172 Value = 1;
Edward O'Callaghan5de55222015-01-14 00:41:44 +1100[diff] [blame]173 } else if (FieldName < BFEndOfList) {
zbao7d94cf92012-07-02 14:19:14 +0800[diff] [blame]174 Address = NBPtr->NBRegTable[FieldName];
175 if (Address) {
176 Lowbit = TSEFO_END (Address);
177 Highbit = TSEFO_START (Address);
178 Type = (UINT8) TSEFO_TYPE (Address);
179 IsLinked = (UINT8) TSEFO_LINKED (Address);
180 IsPhyDirectAccess = (UINT8) TSEFO_DIRECT_EN (Address);
181 IsWholeRegAccess = (UINT8) TSEFO_WHOLE_REG_ACCESS (Address);
182 if (NBPtr->MemPstate == MEMORY_PSTATE0) {
183 IsMultipleMPstate = TSEFO_MULTI_MPSTATE_COPY (Address);
184 } else {
185 // Do not write in both instances when context is already in MP1
186 IsMultipleMPstate = 0;
187 }
188
189 Address = TSEFO_OFFSET (Address);
190
191 // By default, a bit field has only one instance
192 NumOfInstances = 1;
193
194 if ((Type == DCT_PHY_ACCESS) && IsPhyDirectAccess) {
195 Address |= PHY_DIRECT_ADDRESS_MASK;
196 if (IsWholeRegAccess) {
197 // In the case of whole regiter access (bit 0 to 15),
198 // HW broadcast and nibble mask will be used.
199 Address |= Lowbit << 16;
200 Lowbit = 0;
201 Highbit = 15;
202 } else {
203 // In the case only some bits on a register is accessed,
204 // BIOS will do read-mod-write to all chiplets manually.
205 // And nibble mask will be 1111b always.
206 if ((Address & 0xFFFF) == 0xE008) {
207 // Special case for PStateToAccess, which use nibble mask
208 Address |= 0x00040000;
209 } else {
210 Address |= 0x000F0000;
211 }
212 Field >>= Lowbit;
213 if ((Address & 0x0F00) == 0x0F00) {
214 // Broadcast mode
215 // Find out how many instances to write to
216 NumOfInstances = InstancesPerTypeTN[(Address >> 13) & 0x7];
217 if (!IsSet) {
218 // For read, only read from instance 0 in broadcast mode
219 NumOfInstances = 1;
220 }
221 }
222 }
223 }
224
225 ASSERT (NumOfInstances > 0);
226
227 for (Instance = 0; Instance < NumOfInstances; Instance++) {
228 if (Type == NB_ACCESS) {
229 PciAddr.AddressValue = Address;
230 PciAddr.Address.Device = NBPtr->PciAddr.Address.Device;
231 PciAddr.Address.Bus = NBPtr->PciAddr.Address.Bus;
232 PciAddr.Address.Segment = NBPtr->PciAddr.Address.Segment;
233 Address = PciAddr.AddressValue;
234 LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
235 if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
236 IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n",
237 NBPtr->PciAddr.Address.Device, NBPtr->Dct,
Konstantin Aladyshev86569142017-08-01 14:29:20 +0300[diff] [blame]238 (Address >> 12) & 0x7, Address & 0xFFF, Value);
zbao7d94cf92012-07-02 14:19:14 +0800[diff] [blame]239 }
240 } else if (Type == DCT_PHY_ACCESS) {
241 if (IsPhyDirectAccess && (NumOfInstances > 1)) {
242 Address = (Address & 0x0FFFF0FF) | (((UINT32) Instance) << 8);
243 }
244 MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
245 Value = MemNGetBitFieldNb (NBPtr, BFDctAddlDataReg);
246 IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn2_9C_%x = %x\n", NBPtr->PciAddr.Address.Device, NBPtr->Dct, Address & 0x0FFFFFFF, Value);
247 } else {
248 // DCT_EXTRA_ACCESS is not supported on TN
249 ASSERT (FALSE);
250 }
251
252 if (IsSet) {
253 // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
254 if ((Highbit - Lowbit) != 31) {
255 Mask = (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
256 } else {
257 Mask = (UINT32)0xFFFFFFFF;
258 }
259 Value &= ~(Mask << Lowbit);
260 Value |= (Field & Mask) << Lowbit;
261
262 do {
263 if (Type == NB_ACCESS) {
264 PciAddr.AddressValue = Address;
265 LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
266 if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) {
267 IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n",
268 NBPtr->PciAddr.Address.Device, NBPtr->Dct,
Konstantin Aladyshev86569142017-08-01 14:29:20 +0300[diff] [blame]269 (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
zbao7d94cf92012-07-02 14:19:14 +0800[diff] [blame]270 }
271 } else if (Type == DCT_PHY_ACCESS) {
272 MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);
273 Address |= DCT_ACCESS_WRITE;
274 MemNSetBitFieldNb (NBPtr, BFDctAddlOffsetReg, Address);
275 IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn2_9C_%x [%d:%d] = %x\n",
276 NBPtr->PciAddr.Address.Device, NBPtr->Dct,
277 Address & 0x0FFFFFFF, Highbit, Lowbit, Field);
278 } else {
279 // DCT_EXTRA_ACCESS is not supported on TN
280 ASSERT (FALSE);
281 }
282 if (IsLinked) {
283 MemNCmnGetSetFieldTN (NBPtr, 1, FieldName + 1, Field >> (Highbit - Lowbit + 1));
284 }
285 if (IsMultipleMPstate && (NBPtr->MemPstateStage == MEMORY_PSTATE_1ST_STAGE)) {
286 // if there are multiple Pstate register copies, program register in M1 context when the frequency is DDR667
287 if (NBPtr->MemPstate == MEMORY_PSTATE0) {
288 MemNChangeMemPStateContextNb (NBPtr, 1);
289 } else {
290 // Switch back to M0 context
291 MemNChangeMemPStateContextNb (NBPtr, 0);
292 }
293 }
294 } while ((NBPtr->MemPstate == MEMORY_PSTATE1) && IsMultipleMPstate && (NBPtr->MemPstateStage == MEMORY_PSTATE_1ST_STAGE));
295 } else {
296 Value = Value >> Lowbit; // Shift
297 // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
298 if ((Highbit - Lowbit) != 31) {
299 Value &= (((UINT32)1 << (Highbit - Lowbit + 1)) - 1);
300 }
301 if (IsLinked) {
302 Value |= MemNCmnGetSetFieldTN (NBPtr, 0, FieldName + 1, 0) << (Highbit - Lowbit + 1);
303 }
304 // For direct phy access, shift the bit back for compatibility reason.
305 if ((Type == DCT_PHY_ACCESS) && IsPhyDirectAccess) {
306 Value <<= Lowbit;
307 }
308 }
309 }
310 } else {
311 IDS_HDT_CONSOLE (MEM_UNDEF_BF, "\t\tUndefined BF enum: %x\n", FieldName);
312 }
313 } else {
314 ASSERT (FALSE); // Invalid bit field index
315 }
316 return Value;
317}
318
319
320/* -----------------------------------------------------------------------------*/
321/**
322 *
323 *
324 * This function initializes bit field translation table
325 *
326 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
327 * @param[in,out] NBRegTable[] - Pointer to the bit field data structure
328 *
329 */
330
331VOID
332MemNInitNBRegTableTN (
333 IN OUT MEM_NB_BLOCK *NBPtr,
334 IN OUT TSEFO NBRegTable[]
335 )
336{
337 UINT16 i;
338
339 // Allocate heap for NB register table
340 if (!MemNAllocateNBRegTableNb (NBPtr, NbRegTabTN)) {
341 return; // escape if fails
342 }
343 NBRegTable = NBPtr->NBRegTable;
344
345 for (i = 0; i < BFEndOfList; i++) {
346 NBRegTable[i] = 0;
347 }
348
349 // ---------------------------------------------------------------------------
350 //
351 // FUNCTION 1
352 //
353 // ---------------------------------------------------------------------------
354 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 31, 0, BFDramBaseReg0);
355 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 31, 0, BFDramLimitReg0);
356 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0xF0), 31, 0, BFDramHoleAddrReg);
357 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x140), 7, 0, BFDramBaseHiReg0);
358 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x144), 7, 0, BFDramLimitHiReg0);
359
360 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 0, 0, BFDramRngRE0);
361 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x40), 1, 1, BFDramRngWE0);
362
363 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x44), 2, 0, BFDramRngDstNode0);
364
365 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0xF0), 31, 24, BFDramHoleBase);
366 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0xF0), 15, 7, BFDramHoleOffset);
367 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0xF0), 1, 1, BFDramMemHoistValid);
368 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0xF0), 0, 0, BFDramHoleValid);
369
370 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x10C), 5, 4, BFNbPsSel);
371 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x10C), 3, 3, BFMemPsSel);
372 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x10C), 0, 0, BFDctCfgSel);
373
374 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x120), 20, 0, BFDramBaseAddr);
375 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (1, 0x124), 20, 0, BFDramLimitAddr);
376 // ---------------------------------------------------------------------------
377 //
378 // FUNCTION 2
379 //
380 // ---------------------------------------------------------------------------
381 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x40), 31, 0, BFCSBaseAddr0Reg);
382 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x44), 31, 0, BFCSBaseAddr1Reg);
383 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x48), 31, 0, BFCSBaseAddr2Reg);
384 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x4C), 31, 0, BFCSBaseAddr3Reg);
385 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x50), 31, 0, BFCSBaseAddr4Reg);
386 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x54), 31, 0, BFCSBaseAddr5Reg);
387 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x58), 31, 0, BFCSBaseAddr6Reg);
388 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x5C), 31, 0, BFCSBaseAddr7Reg);
389
390 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x60), 31, 0, BFCSMask0Reg);
391 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x64), 31, 0, BFCSMask1Reg);
392 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x68), 31, 0, BFCSMask2Reg);
393 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x6C), 31, 0, BFCSMask3Reg);
394
395 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x78), 17, 17, BFAddrCmdTriEn);
396
397 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 0, BFDramInitRegReg);
398 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 31, 31, BFEnDramInit);
399 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 30, 30, BFSendCtrlWord);
400 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 29, 29, BFSendZQCmd);
401 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 28, 28, BFAssertCke);
402 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 27, 27, BFDeassertMemRstX);
403 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 26, 26, BFSendMrsCmd);
404 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 25, 25, BFSendAutoRefresh);
405 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 23, 21, BFMrsChipSel);
406 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 20, 18, BFMrsBank);
407 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x7C), 17, 0, BFMrsAddress);
408
409 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x80), 16, 0, BFDramBankAddrReg);
410
411 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 31, 0, BFDramMRSReg);
412 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 23, 23, BFPchgPDModeSel);
413 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x84), 1, 0, BFBurstCtrl);
414
415 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x88), 29, 24, BFMemClkDis);
416
417 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 18, 18, BFDisAutoRefresh);
418 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x8C), 17, 16, BFTref);
419
420 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 27, 27, BFDisDllShutdownSR);
421 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 25, 25, BFPendRefPaybackS3En);
422 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 24, 24, BFStagRefEn);
423 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 23, 23, BFForceAutoPchg);
424 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 20, 20, BFDynPageCloseEn);
425 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 17, 17, BFEnterSelfRef);
426 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 16, 16, BFUnBuffDimm);
427 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x90), 1, 1, BFExitSelfRef);
428
429 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31, 0, BFDramConfigHiReg);
430 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 31, 31, BFDphyMemPsSelEn);
431 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 28, 24, BFDcqBypassMax);
432 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 22, 22, BFBankSwizzleMode);
433 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 21, 21, BFFreqChgInProg);
434 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 20, 20, BFSlowAccessMode);
435 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 19, 19, BFDcqArbBypassEn);
436 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 16, 16, BFPowerDownMode);
437 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 15, 15, BFPowerDownEn);
438 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 14, 14, BFDisDramInterface);
439 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 11, 10, BFZqcsInterval);
440 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 7, 7, BFMemClkFreqVal);
441 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x94), 4, 0, BFMemClkFreq);
442
443 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x98), 31, 0, BFDctAddlOffsetReg);
444
445 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x9C), 31, 0, BFDctAddlDataReg);
446
447 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA4), 23, 20, BFBwCapCmdThrottleMode);
448 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA4), 14, 12, BFCmdThrottleMode);
449 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA4), 11, 11, BFBwCapEn);
450 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA4), 8, 8, BFODTSEn);
451
452 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 31, 31, BFPerRankTimingEn);
453 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 29, 29, BFRefChCmdMgtDis);
454 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 28, 28, BFFastSelfRefEntryDis);
455 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 22, 22, BFPrtlChPDEnhEn);
456 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 21, 21, BFAggrPDEn);
457 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 20, 20, BFBankSwap);
458 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 17, 16, BFMemPhyPllPdMode);
459 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 15, 8, BFCtrlWordCS);
460 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0xA8), 5, 5, BFSubMemclkRegDly);
461
462 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x10C), 0, 0, BFIntLvRgnSwapEn);
463 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x10C), 9, 3, BFIntLvRgnBaseAddr);
464 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x10C), 17, 11, BFIntLvRgnLmtAddr);
465 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x10C), 26, 20, BFIntLvRgnSize);
466
467 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 31, 11, BFDctSelBaseAddr);
468 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 10, 10, BFMemCleared);
469 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 9, 9, BFMemClrBusy);
470 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 8, 8, BFDramEnabled);
471 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 7, 6, BFDctSelIntLvAddr);
472 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 5, 5, BFDctDatIntLv);
473 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 3, 3, BFMemClrInit);
474 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 2, 2, BFDctSelIntLvEn);
475 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 1, 1, BFDctSelHi);
476 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x110), 0, 0, BFDctSelHiRngEn);
477
478 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 31, 10, BFDctSelBaseOffset);
479 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x114), 9, 9, BFDctSelIntLvAddrHi);
480
481 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x118), 31, 0, BFMctCfgLoReg);
482 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x118), 27, 27, BFMctEccDisLatOptEn);
483 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x118), 19, 19, BFLockDramCfg);
484 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x118), 18, 18, BFCC6SaveEn);
485
486 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x11C), 31, 0, BFMctCfgHiReg);
487
488 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x1B0), 31, 0, BFExtMctCfgLoReg);
489 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x1B4), 31, 0, BFExtMctCfgHiReg);
490 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x1B4), 27, 27, BFFlushWrOnS3StpGnt);
491 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x1B4), 26, 26, BFEnSplitMctDatBuffers);
492
493 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x200), 29, 24, BFTras);
494 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x200), 20, 16, BFTrp);
495 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x200), 12, 8, BFTrcd);
496 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x200), 4, 0, BFTcl);
497
498 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x204), 27, 24, BFTrtp);
499 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x204), 21, 16, BFFourActWindow);
500 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x204), 11, 8, BFTrrd);
501 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x204), 5, 0, BFTrc);
502
503 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x208), 26, 24, BFTrfc3);
504 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x208), 18, 16, BFTrfc2);
505 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x208), 10, 8, BFTrfc1);
506 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x208), 2, 0, BFTrfc0);
507
508 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x20C), 17, 16, BFWrDqDqsEarly);
509 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x20C), 11, 8, BFTwtr);
510 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x20C), 4, 0, BFTcwl);
511
512 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x210), 31, 22, BFMaxLatency);
513 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x210), 18, 16, BFDataTxFifoWrDly);
514 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x210), 3, 0, BFRdPtrInit);
515
516 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x214), 19, 16, BFTwrwrSdSc);
517 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x214), 11, 8, BFTwrwrSdDc);
518 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x214), 3, 0, BFTwrwrDd);
519
520 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x218), 27, 24, BFTrdrdSdSc);
521 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x218), 19, 16, BFTrdrdSdDc);
522 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x218), 11, 8, BFTwrrd);
523 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x218), 3, 0, BFTrdrdDd);
524
525 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x21C), 20, 16, BFTrwtWB);
526 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x21C), 12, 8, BFTrwtTO);
527
528 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x220), 12, 8, BFTmod);
529 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x220), 3, 0, BFTmrd);
530
531 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x224), 10, 8, BFTzqcs);
532 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x224), 3, 0, BFTzqoper);
533
534 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x228), 31, 24, BFTstag3);
535 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x228), 23, 16, BFTstag2);
536 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x228), 15, 8, BFTstag1);
537 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x228), 7, 0, BFTstag0);
538
539 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x22C), 4, 0, BFTwrDDR3);
540
541 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x230), 31, 0, BFPhyRODTCSLow);
542 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x234), 31, 0, BFPhyRODTCSHigh);
543 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x238), 31, 0, BFPhyWODTCSLow);
544 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x23C), 31, 0, BFPhyWODTCSHigh);
545
546 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x240), 14, 12, BFWrOdtOnDuration);
547 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x240), 10, 8, BFWrOdtTrnOnDly);
548 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x240), 6, 4, BFRdOdtOnDuration);
549 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x240), 3, 0, BFRdOdtTrnOnDly);
550
551 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x244), 3, 0, BFPrtlChPDDynDly);
552
553 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x248), 31, 31, BFRxChMntClkEn);
554 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x248), 29, 24, BFAggrPDDelay);
555 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x248), 21, 16, BFPchgPDEnDelay);
556 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x248), 12, 8, BFTxpdll);
557 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x248), 3, 0, BFTxp);
558
559 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x24C), 29, 24, BFTcksrx);
560 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x24C), 21, 16, BFTcksre);
561 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x24C), 13, 8, BFTckesr);
562 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x24C), 3, 0, BFTpd);
563
564 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 12, 12, BFCmdSendInProg);
565 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 11, 11, BFSendCmd);
566 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 10, 10, BFTestStatus);
567 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 9, 8, BFCmdTgt);
568 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 7, 5, BFCmdType);
569 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 4, 4, BFStopOnErr);
570 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 3, 3, BFResetAllErr);
571 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 2, 2, BFCmdTestEnable);
572 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x250), 13, 13, BFLfsrRollOver );
573
574 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x254), 26, 24, BFTgtChipSelectA);
575 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x254), 23, 21, BFTgtBankA);
576 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x254), 9, 0, BFTgtAddressA);
577
578 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x258), 26, 24, BFTgtChipSelectB);
579 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x258), 23, 21, BFTgtBankB);
580 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x258), 9, 0, BFTgtAddressB);
581
582
583 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x260), 20, 0, BFCmdCount);
584
585 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x264), 31, 25, BFErrDqNum);
586 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x264), 24, 0, BFErrCnt);
587
588 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x268), 17, 0, BFNibbleErrSts);
589
590 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x26C), 17, 0, BFNibbleErr180Sts);
591
592 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x270), 18, 0, BFDataPrbsSeed);
593
594 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x274), 31, 0, BFDramDqMaskLow );
595 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x278), 31, 0, BFDramDqMaskHigh);
596
597 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x28C), 31, 31, BFSendActCmd);
598 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x28C), 30, 30, BFSendPchgCmd);
599 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x28C), 29, 22, BFCmdChipSelect);
600 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x28C), 21, 19, BFCmdBank);
601 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x28C), 17, 0, BFCmdAddress);
602 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x28C), 31, 0, BFDramCommand2 );
603
604 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x290), 26, 24, BFErrBeatNum);
605 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x290), 20, 0, BFErrCmdNum);
606
607 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x294), 31, 0, BFDQErrLow);
608 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x298), 31, 0, BFDQErrHigh);
609
610 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2E0), 30, 30, BFFastMstateDis);
611 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2E0), 28, 24, BFM1MemClkFreq);
612 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2E0), 22, 20, BFMxMrsEn);
613
614 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2E8), 31, 16, BFMxMr1);
615 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2E8), 15, 0, BFMxMr0);
616 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2EC), 15, 0, BFMxMr2);
617
618 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x2F0), 0, 0, BFEffArbDis);
619
620 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x400), 11, 8, BFGmcTokenLimit);
621 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x400), 3, 0, BFMctTokenLimit);
622 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x404), 16, 0, BFGmcToDctControl1);
623 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (2, 0x408), 0, 0, BFCpuElevPrioDis);
624
625 // ---------------------------------------------------------------------------
626 //
627 // DCT PHY REGISTERS
628 //
629 // ---------------------------------------------------------------------------
630 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 31, 0, BFODCControl);
631 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 22, 20, BFDqsDrvStren);
632 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 18, 16, BFDataDrvStren);
633 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 14, 12, BFClkDrvStren);
634 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 10, 8, BFAddrCmdDrvStren);
635 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 6, 4, BFCsOdtDrvStren);
636 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x00, 2, 0, BFCkeDrvStren);
637
638 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x04, 31, 0, BFAddrTmgControl);
639
640 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 30, 29, BFDisablePredriverCal);
641 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 13, 13, BFDqsRcvTrEn);
642 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 12, 12, BFWrLvOdtEn);
643 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 11, 8, BFWrLvOdt);
644 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 7, 6, BFFenceTrSel);
645 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 5, 4, BFTrDimmSel);
646 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 3, 3, BFPhyFenceTrEn);
647 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 2, 2, BFTrNibbleSel);
648 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x08, 0, 0, BFWrtLvTrEn);
649
650 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0B, 31, 0, BFDramPhyStatusReg);
651
652 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0C, 20, 16, BFPhyFence);
653 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0C, 15, 12, BFCKETri);
654 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0C, 11, 8, BFODTTri);
655 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0C, 7, 0, BFChipSelTri);
656
657 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0D, 25, 24, BFRxDLLWakeupTime);
658 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0D, 22, 20, BFRxCPUpdPeriod);
659 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0D, 19, 16, BFRxMaxDurDllNoLock);
660 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0D, 9, 8, BFTxDLLWakeupTime);
661 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0D, 6, 4, BFTxCPUpdPeriod);
662 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x0D, 3, 0, BFTxMaxDurDllNoLock);
663
664 MAKE_TSEFO (NBRegTable, DCT_PHY_ACCESS, 0x50, 31, 0, BFRstRcvFifo);
665
666 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F13, 8, 8, BFRxSsbMntClkEn);
667 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F13, 14, 14, BFProcOdtAdv);
668 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F13, 7, 0, BFPhy0x0D0F0F13);
669 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F30, 4, 4, BFEccDLLPwrDnConf);
670 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FE013, 15, 0, BFPllRegWaitTime);
671 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FE006, 15, 0, BFPllLockTime);
672
673 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F02, 15, 0, BFDataByteTxPreDriverCal);
674 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F06, 15, 0, BFDataByteTxPreDriverCal2Pad1);
675 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F0A, 15, 0, BFDataByteTxPreDriverCal2Pad2);
676 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F8006, 15, 0, BFCmdAddr0TxPreDriverCal2Pad1);
677 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F800A, 15, 0, BFCmdAddr0TxPreDriverCal2Pad2);
678 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F8106, 15, 0, BFCmdAddr1TxPreDriverCal2Pad1);
679 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F810A, 15, 0, BFCmdAddr1TxPreDriverCal2Pad2);
680 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC006, 15, 0, BFAddrTxPreDriverCal2Pad1);
681 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC00A, 15, 0, BFAddrTxPreDriverCal2Pad2);
682 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC00E, 15, 0, BFAddrTxPreDriverCal2Pad3);
683 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC012, 15, 0, BFAddrTxPreDriverCal2Pad4);
684 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F8002, 15, 0, BFCmdAddr0TxPreDriverCalPad0);
685 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F8102, 15, 0, BFCmdAddr1TxPreDriverCalPad0);
686 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC002, 15, 0, BFAddrTxPreDriverCalPad0);
687 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F2002, 15, 0, BFClock0TxPreDriverCalPad0);
688 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F2102, 15, 0, BFClock1TxPreDriverCalPad0);
689 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F2202, 15, 0, BFClock2TxPreDriverCalPad0);
690
691 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F812F, 15, 0, BFAddrCmdTri);
692
693 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F10, 12, 12, BFEnRxPadStandby);
694 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F10, 3, 0, BFDllNoLock);
695
696 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D04E008, 8, 8, BFPStateToAccess);
697 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FE00A, 4, 4, BFSkewMemClk);
698
699 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F4003, 15, 0, BFChAM1FenceSave);
700 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F4004, 15, 0, BFChBM1FenceSave);
701
702 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F2030, 4, 4, BFPhyClkConfig0);
703 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F2130, 4, 4, BFPhyClkConfig1);
704
705 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC000, 8, 8, BFLowPowerDrvStrengthEn);
706 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FE040, 3, 0, BFRate);
707
708 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F1F, 8, 8, BFRx4thStgEn);
709 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F1F, 4, 3, BFDataRxVioLvl);
710 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F1F, 2, 2, BFRxBypass3rd4thStg);
711 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F2F1F, 4, 3, BFClkRxVioLvl);
712 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F4009, 3, 2, BFCsrComparator);
713 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F4009, 15, 14, BFCmpVioLvl);
714 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F8F1F, 4, 3, BFCmdRxVioLvl);
715 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FC01F, 4, 3, BFAddrRxVioLvl);
716
717 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F31, 9, 0, BFDataFence2);
718 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FE019, 14, 0, BFFence2);
719
720 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F30, 8, 8, BFBlockRxDqsLock);
721
722 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F001C, 15, 0, BFDataByteDllPowerMgnByte0);
723 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F011C, 15, 0, BFDataByteDllPowerMgnByte1);
724 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F021C, 15, 0, BFDataByteDllPowerMgnByte2);
725 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F031C, 15, 0, BFDataByteDllPowerMgnByte3);
726 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F041C, 15, 0, BFDataByteDllPowerMgnByte4);
727 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F051C, 15, 0, BFDataByteDllPowerMgnByte5);
728 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F061C, 15, 0, BFDataByteDllPowerMgnByte6);
729 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F071C, 15, 0, BFDataByteDllPowerMgnByte7);
730 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0F0F1C, 15, 0, BFDataByteDllPowerMgnByteAll);
731
732 MAKE_TSEFO (NBRegTable, DCT_PHY_DIRECT, 0x0D0FE018, 8, 8, BFPhyPSMasterChannel);
733
734
735 // ---------------------------------------------------------------------------
736 //
737 // FUNCTION 4
738 //
739 // ---------------------------------------------------------------------------
740 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (4, 0x128), 17, 12, BFCoreStateSaveDestNode);
741
742 // ---------------------------------------------------------------------------
743 //
744 // FUNCTION 5
745 //
746 // ---------------------------------------------------------------------------
747 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x84), 20, 16, BFDdrMaxRate);
748
749 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x160), 18, 18, BFMemPstate0);
750 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x164), 18, 18, BFMemPstate1);
751 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x168), 18, 18, BFMemPstate2);
752 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x16C), 18, 18, BFMemPstate3);
753 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x160), 16, 10, BFNbVid0);
754 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x164), 16, 10, BFNbVid1);
755 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x168), 16, 10, BFNbVid2);
756 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x16C), 16, 10, BFNbVid3);
757 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x160), 21, 21, BFNbVid0Hi);
758 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x164), 21, 21, BFNbVid1Hi);
759 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x168), 21, 21, BFNbVid2Hi);
760 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x16C), 21, 21, BFNbVid3Hi);
761
762 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x170), 31, 0, BFNbPstateCtlReg);
763 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x170), 31, 31, BFMemPstateDis);
764 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x170), 14, 14, BFSwNbPstateLoDis);
765 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x170), 7, 6, BFNbPstateHi);
766 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x170), 4, 3, BFNbPstateLo);
767 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x170), 1, 0, BFNbPstateMaxVal);
768
769 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x174), 24, 24, BFCurMemPstate);
770 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x174), 20, 19, BFCurNbPstate);
771 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x174), 0, 0, BFNbPstateDis);
772
773 MAKE_TSEFO (NBRegTable, NB_ACCESS, _FN (5, 0x188), 1, 0, BFNbOffsetTrim);
774
775 // ---------------------------------------------------------------------------
776 //
777 // LINK BITFIELD
778 //
779 // ---------------------------------------------------------------------------
780 LINK_TSEFO (NBRegTable, BFDctSelIntLvAddr, BFDctSelIntLvAddrHi);
781 LINK_TSEFO (NBRegTable, BFNbVid0, BFNbVid0Hi);
782 LINK_TSEFO (NBRegTable, BFNbVid1, BFNbVid1Hi);
783 LINK_TSEFO (NBRegTable, BFNbVid2, BFNbVid2Hi);
784 LINK_TSEFO (NBRegTable, BFNbVid3, BFNbVid3Hi);
785
786 // ---------------------------------------------------------------------------
787 //
788 // REGISTERS WITH MULTIPLE MEMORY PSTATE COPIES
789 //
790 // ---------------------------------------------------------------------------
791 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFODCControl);
792 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFDqsDrvStren);
793 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFDataDrvStren);
794 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFClkDrvStren);
795 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFAddrCmdDrvStren);
796 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFCsOdtDrvStren);
797 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFCkeDrvStren);
798 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFAddrTmgControl);
799 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFDisablePredriverCal);
800 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFProcOdtAdv);
801 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFDataRxVioLvl);
802 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFRx4thStgEn);
803 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFRxBypass3rd4thStg);
804 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTras);
805 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTrp);
806 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTrcd);
807 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTcl);
808 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTrtp);
809 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFFourActWindow);
810 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTrrd);
811 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTrc);
812 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFWrDqDqsEarly);
813 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTwtr);
814 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTcwl);
815 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFTwrDDR3);
816 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFWrOdtOnDuration);
817 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFWrOdtTrnOnDly);
818 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFRdOdtOnDuration);
819 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFRdOdtTrnOnDly);
820 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFMxMr0);
821 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFMxMr1);
822 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFMxMr2);
823 // These Phy fence registers don't have mutiple memory Pstate copies
824 // But they need to be written again in M1 context
825 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFDataFence2);
826 MULTI_MPSTATE_COPY_TSEFO (NBRegTable, BFFence2);
827
828 IDS_OPTION_HOOK (IDS_INIT_MEM_REG_TABLE, NBPtr, &NBPtr->MemPtr->StdHeader);
829}