zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /** |
| 2 | * @file |
| 3 | * |
| 4 | * ALIB ASL library |
| 5 | * |
| 6 | * |
| 7 | * |
| 8 | * @xrefitem bom "File Content Label" "Release Content" |
| 9 | * @e project: AGESA |
| 10 | * @e sub-project: GNB |
| 11 | * @e \$Revision: 63659 $ @e \$Date: 2012-01-03 00:42:47 -0600 (Tue, 03 Jan 2012) $ |
| 12 | * |
| 13 | */ |
| 14 | /* |
| 15 | ***************************************************************************** |
| 16 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 17 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 18 | * All rights reserved. |
| 19 | * |
| 20 | * Redistribution and use in source and binary forms, with or without |
| 21 | * modification, are permitted provided that the following conditions are met: |
| 22 | * * Redistributions of source code must retain the above copyright |
| 23 | * notice, this list of conditions and the following disclaimer. |
| 24 | * * Redistributions in binary form must reproduce the above copyright |
| 25 | * notice, this list of conditions and the following disclaimer in the |
| 26 | * documentation and/or other materials provided with the distribution. |
| 27 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 28 | * its contributors may be used to endorse or promote products derived |
| 29 | * from this software without specific prior written permission. |
| 30 | * |
| 31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 32 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 33 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 34 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 35 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 36 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 37 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 38 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 39 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 40 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 41 | * *************************************************************************** |
| 42 | * |
| 43 | */ |
| 44 | |
| 45 | DefinitionBlock ( |
| 46 | "PcieAlibSsdtTN.aml", |
| 47 | "SSDT", |
| 48 | 2, |
| 49 | "AMD", |
| 50 | "ALIB", |
| 51 | 0x1 |
| 52 | ) |
| 53 | { |
| 54 | Scope(\_SB) { |
| 55 | |
| 56 | Name (varMaxPortIndexNumber, 6) |
| 57 | |
| 58 | include ("PcieAlibMmioData.asl") |
| 59 | include ("PcieAlibPciLib.asl") |
| 60 | include ("PcieAlibDebugLib.asl") |
| 61 | include ("PcieSmuServiceV4.asl") |
| 62 | |
| 63 | |
| 64 | Name (varBapmControl, 0) |
| 65 | Name (varCstateIntControlState, 0) |
| 66 | Name (varIsStateInitialized, 0) |
| 67 | /*----------------------------------------------------------------------------------------*/ |
| 68 | /** |
| 69 | * APM/PDM stub |
| 70 | * |
| 71 | * Arg0 - AC/DC state |
| 72 | * |
| 73 | */ |
| 74 | Method (procApmPdmActivate, 1, NotSerialized) { |
| 75 | Store (Or(ShiftLeft (0x18, 3), 4), Local2) |
| 76 | if (LEqual (varIsStateInitialized, 0)) { |
| 77 | Store (procPciDwordRead (Local2, 0x124), varCstateIntControlState) |
| 78 | Store (1, varIsStateInitialized) |
| 79 | } |
| 80 | |
| 81 | Store (procPciDwordRead (Local2, 0x124), Local3) |
| 82 | if (LEqual (Arg0,DEF_PSPP_STATE_AC)) { |
| 83 | // Disable PC6 on AC |
| 84 | Or (Local3, And (varCstateIntControlState, 0x00400000), Local3) |
| 85 | } else { |
| 86 | // Enable PC6 on DC |
| 87 | And (Local3, 0xFFBFFFFF, Local3) |
| 88 | } |
| 89 | procPciDwordWrite (Local2, 0x124, Local3) |
| 90 | |
| 91 | if (LEqual (varBapmControl, 0)) { |
| 92 | // If GFX present driver manage BAPM if not ALIB manage BAPM |
| 93 | if (LEqual (procPciDwordRead (0x08, 0x00), 0xffffffff)) { |
| 94 | And (procIndirectRegisterRead (0x0, 0xB8, 0x1F428), 0x2, Local1); |
| 95 | // check if BAPM was enable during BIOS post |
| 96 | if (LEqual (Local1, 0x2)) { |
| 97 | Store (1, varBapmControl) |
| 98 | } |
| 99 | } |
| 100 | } |
| 101 | if (LEqual (varBapmControl,1)) { |
| 102 | if (LEqual (Arg0,DEF_PSPP_STATE_AC)) { |
| 103 | // Enable BAPM on AC |
| 104 | Store (32, Local0) |
| 105 | } else { |
| 106 | // Disable BAPM on DC |
| 107 | Store (33, Local0) |
| 108 | } |
| 109 | procNbSmuServiceRequest (Local0); |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | Name (varRestoreNbps, 0) |
| 114 | Name (varRestoreNbDpmState, 0) |
| 115 | /*----------------------------------------------------------------------------------------*/ |
| 116 | /** |
| 117 | * _WAK |
| 118 | * |
| 119 | * |
| 120 | * |
| 121 | */ |
| 122 | Method (AWAK, 1) { |
| 123 | if (LEqual (Arg0, 3)) { |
| 124 | // Clear D18F5x170 [SwNbPstateLoDis] only if it was 0 in APTS |
| 125 | if (LEqual (varRestoreNbps, 1)) { |
| 126 | Store (procPciDwordRead (0xC5, 0x170), Local0) |
| 127 | procPciDwordWrite (0xC5, 0x170, And (Local0, Not (ShiftLeft (1, 14)))) |
| 128 | Store (0, varRestoreNbps); |
| 129 | } |
| 130 | if (LEqual (varRestoreNbDpmState, 1)) { |
| 131 | Store (procIndirectRegisterRead (0x0, 0xB8, 0x1F428), Local0) |
| 132 | procIndirectRegisterWrite (0x0, 0xB8, 0x1F428, Or (Local0, ShiftLeft (1, 5))) |
| 133 | procNbSmuServiceRequest (22); |
| 134 | Store (0, varRestoreNbDpmState) |
| 135 | } |
| 136 | } |
| 137 | } |
| 138 | /*----------------------------------------------------------------------------------------*/ |
| 139 | /** |
| 140 | * _PTS |
| 141 | * |
| 142 | * |
| 143 | * |
| 144 | */ |
| 145 | Method (APTS, 1) { |
| 146 | if (LEqual (Arg0, 3)) { |
| 147 | procApmPdmActivate (DEF_PSPP_STATE_DC); |
| 148 | // Disable NBDPM |
| 149 | Store (procIndirectRegisterRead (0x0, 0xB8, 0x1F428), Local0) |
| 150 | if (LNotEqual (And (Local0, ShiftLeft (1, 5)), 0)) { |
| 151 | // NBDPM enabled lets disable it |
| 152 | procIndirectRegisterWrite (0x0, 0xB8, 0x1F428, And (Local0, Not (ShiftLeft (1, 5)))) |
| 153 | procNbSmuServiceRequest (22); |
| 154 | // Indicate needs to restore NBDPM |
| 155 | Store (1, varRestoreNbDpmState); |
| 156 | } |
| 157 | // Save state of D18F5x170 [SwNbPstateLoDis] |
| 158 | Store (procPciDwordRead (0xC5, 0x170), Local0) |
| 159 | if (LEqual (And (Local0, ShiftLeft (1, 14)), 0)) { |
| 160 | // Set D18F5x170 [SwNbPstateLoDis] = 1 |
| 161 | procPciDwordWrite (0xC5, 0x170, Or (Local0, ShiftLeft (1, 14))) |
| 162 | Store (1, varRestoreNbps); |
| 163 | } |
| 164 | } |
| 165 | } |
| 166 | } //End of Scope(\_SB) |
| 167 | } //End of DefinitionBlock |
| 168 | |
| 169 | |