zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * PCIe family specific services. |
| 6 | * |
| 7 | * |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: GNB |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
| 31 | * |
| 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | * *************************************************************************** |
| 43 | * |
| 44 | */ |
| 45 | #ifndef _GNBPCIEFAMSERVICES_H_ |
| 46 | #define _GNBPCIEFAMSERVICES_H_ |
| 47 | |
| 48 | #include "Gnb.h" |
| 49 | #include "GnbPcie.h" |
| 50 | |
| 51 | AGESA_STATUS |
| 52 | PcieFmGetComplexDataLength ( |
| 53 | IN UINT8 SocketId, |
| 54 | OUT UINTN *Length, |
| 55 | IN AMD_CONFIG_PARAMS *StdHeader |
| 56 | ); |
| 57 | |
| 58 | typedef AGESA_STATUS F_PCIEFMGETCOMPLEXDATALENGTH ( |
| 59 | IN UINT8 SocketId, |
| 60 | OUT UINTN *Length, |
| 61 | IN AMD_CONFIG_PARAMS *StdHeader |
| 62 | ); |
| 63 | |
| 64 | AGESA_STATUS |
| 65 | PcieFmBuildComplexConfiguration ( |
| 66 | IN UINT8 SocketId, |
| 67 | OUT VOID *Buffer, |
| 68 | IN AMD_CONFIG_PARAMS *StdHeader |
| 69 | ); |
| 70 | |
| 71 | typedef AGESA_STATUS F_PCIEFMBUILDCOMPLEXCONFIGURATION ( |
| 72 | IN UINT8 SocketId, |
| 73 | OUT VOID *Buffer, |
| 74 | IN AMD_CONFIG_PARAMS *StdHeader |
| 75 | ); |
| 76 | |
| 77 | AGESA_STATUS |
| 78 | PcieFmConfigureEnginesLaneAllocation ( |
| 79 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 80 | IN PCIE_ENGINE_TYPE EngineType, |
| 81 | IN UINT8 ConfigurationId |
| 82 | ); |
| 83 | |
| 84 | typedef AGESA_STATUS F_PCIEFMCONFIGUREENGINESLANEALLOCATION ( |
| 85 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 86 | IN PCIE_ENGINE_TYPE EngineType, |
| 87 | IN UINT8 ConfigurationId |
| 88 | ); |
| 89 | |
| 90 | AGESA_STATUS |
| 91 | PcieFmGetCoreConfigurationValue ( |
| 92 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 93 | IN UINT8 CoreId, |
| 94 | IN UINT64 ConfigurationSignature, |
| 95 | IN UINT8 *ConfigurationValue |
| 96 | ); |
| 97 | |
| 98 | typedef AGESA_STATUS F_PCIEFMGETCORECONFIGURATIONVALUE ( |
| 99 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 100 | IN UINT8 CoreId, |
| 101 | IN UINT64 ConfigurationSignature, |
| 102 | IN UINT8 *ConfigurationValue |
| 103 | ); |
| 104 | |
| 105 | BOOLEAN |
| 106 | PcieFmCheckPortPciDeviceMapping ( |
| 107 | IN PCIe_PORT_DESCRIPTOR *PortDescriptor, |
| 108 | IN PCIe_ENGINE_CONFIG *Engine |
| 109 | ); |
| 110 | |
| 111 | typedef BOOLEAN F_PCIEFMCHECKPORTPCIDEVICEMAPPING ( |
| 112 | IN PCIe_PORT_DESCRIPTOR *PortDescriptor, |
| 113 | IN PCIe_ENGINE_CONFIG *Engine |
| 114 | ); |
| 115 | |
| 116 | AGESA_STATUS |
| 117 | PcieFmMapPortPciAddress ( |
| 118 | IN PCIe_ENGINE_CONFIG *Engine |
| 119 | ); |
| 120 | |
| 121 | typedef AGESA_STATUS F_PCIEFMMAPPORTPCIADDRESS ( |
| 122 | IN PCIe_ENGINE_CONFIG *Engine |
| 123 | ); |
| 124 | |
| 125 | BOOLEAN |
| 126 | PcieFmCheckPortPcieLaneCanBeMuxed ( |
| 127 | IN PCIe_PORT_DESCRIPTOR *PortDescriptor, |
| 128 | IN PCIe_ENGINE_CONFIG *Engine |
| 129 | ); |
| 130 | |
| 131 | typedef BOOLEAN F_PCIEFMCHECKPORTPCIELANECANBEMUXED ( |
| 132 | IN PCIe_PORT_DESCRIPTOR *PortDescriptor, |
| 133 | IN PCIe_ENGINE_CONFIG *Engine |
| 134 | ); |
| 135 | |
| 136 | CONST CHAR8* |
| 137 | PcieFmDebugGetCoreConfigurationString ( |
| 138 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 139 | IN UINT8 ConfigurationValue |
| 140 | ); |
| 141 | |
| 142 | typedef CONST CHAR8* F_PCIEFMDEBUGGETCORECONFIGURATIONSTRING ( |
| 143 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 144 | IN UINT8 ConfigurationValue |
| 145 | ); |
| 146 | |
| 147 | CONST CHAR8* |
| 148 | PcieFmDebugGetWrapperNameString ( |
| 149 | IN PCIe_WRAPPER_CONFIG *Wrapper |
| 150 | ); |
| 151 | |
| 152 | typedef CONST CHAR8* F_PCIEFMDEBUGGETWRAPPERNAMESTRING ( |
| 153 | IN PCIe_WRAPPER_CONFIG *Wrapper |
| 154 | ); |
| 155 | |
| 156 | CONST CHAR8* |
| 157 | PcieFmDebugGetHostRegAddressSpaceString ( |
| 158 | IN PCIe_SILICON_CONFIG *Silicon, |
| 159 | IN UINT16 AddressFrame |
| 160 | ); |
| 161 | |
| 162 | typedef CONST CHAR8* F_PCIEFMDEBUGGETHOSTREGADDRESSSPACESTRING ( |
| 163 | IN PCIe_SILICON_CONFIG *Silicon, |
| 164 | IN UINT16 AddressFrame |
| 165 | ); |
| 166 | |
| 167 | PCIE_LINK_SPEED_CAP |
| 168 | PcieFmGetLinkSpeedCap ( |
| 169 | IN UINT32 Flags, |
| 170 | IN PCIe_ENGINE_CONFIG *Engine |
| 171 | ); |
| 172 | |
| 173 | typedef PCIE_LINK_SPEED_CAP F_PCIEFMGETLINKSPEEDCAP ( |
| 174 | IN UINT32 Flags, |
| 175 | IN PCIe_ENGINE_CONFIG *Engine |
| 176 | ); |
| 177 | |
| 178 | VOID |
| 179 | PcieFmSetLinkSpeedCap ( |
| 180 | IN PCIE_LINK_SPEED_CAP LinkSpeedCapability, |
| 181 | IN PCIe_ENGINE_CONFIG *Engine, |
| 182 | IN PCIe_PLATFORM_CONFIG *Pcie |
| 183 | ); |
| 184 | |
| 185 | typedef VOID F_PCIEFMSETLINKSPEEDCAP ( |
| 186 | IN PCIE_LINK_SPEED_CAP LinkSpeedCapability, |
| 187 | IN PCIe_ENGINE_CONFIG *Engine, |
| 188 | IN PCIe_PLATFORM_CONFIG *Pcie |
| 189 | ); |
| 190 | |
| 191 | UINT32 |
| 192 | PcieFmGetNativePhyLaneBitmap ( |
| 193 | IN UINT32 PhyLaneBitmap, |
| 194 | IN PCIe_ENGINE_CONFIG *Engine |
| 195 | ); |
| 196 | |
| 197 | typedef UINT32 F_PCIEFMGETNATIVEPHYLANEBITMAP ( |
| 198 | IN UINT32 PhyLaneBitmap, |
| 199 | IN PCIe_ENGINE_CONFIG *Engine |
| 200 | ); |
| 201 | |
| 202 | AGESA_STATUS |
| 203 | PcieFmAlibBuildAcpiTable ( |
| 204 | IN VOID *AlibSsdtPtr, |
| 205 | IN AMD_CONFIG_PARAMS *StdHeader |
| 206 | ); |
| 207 | |
| 208 | AGESA_STATUS |
| 209 | PcieFmGetSbConfigInfo ( |
| 210 | IN UINT8 SocketId, |
| 211 | OUT PCIe_PORT_DESCRIPTOR *SbPort, |
| 212 | IN AMD_CONFIG_PARAMS *StdHeader |
| 213 | ); |
| 214 | |
| 215 | typedef AGESA_STATUS F_PCIEFMGETSBCONFIGINFO ( |
| 216 | IN UINT8 SocketId, |
| 217 | OUT PCIe_PORT_DESCRIPTOR *SbPort, |
| 218 | IN AMD_CONFIG_PARAMS *StdHeader |
| 219 | ); |
| 220 | |
| 221 | |
| 222 | /// PCIe config services |
| 223 | typedef struct { |
| 224 | F_PCIEFMGETCOMPLEXDATALENGTH *PcieFmGetComplexDataLength; ///< PcieFmGetComplexDataLength |
| 225 | F_PCIEFMBUILDCOMPLEXCONFIGURATION *PcieFmBuildComplexConfiguration; ///< PcieFmBuildComplexConfiguration |
| 226 | F_PCIEFMCONFIGUREENGINESLANEALLOCATION *PcieFmConfigureEnginesLaneAllocation; ///< PcieFmConfigureEnginesLaneAllocation |
| 227 | F_PCIEFMCHECKPORTPCIDEVICEMAPPING *PcieFmCheckPortPciDeviceMapping; ///< PcieFmCheckPortPciDeviceMapping |
| 228 | F_PCIEFMMAPPORTPCIADDRESS *PcieFmMapPortPciAddress; ///< PcieFmMapPortPciAddress |
| 229 | F_PCIEFMCHECKPORTPCIELANECANBEMUXED *PcieFmCheckPortPcieLaneCanBeMuxed; ///< PcieFmCheckPortPcieLaneCanBeMuxed |
| 230 | F_PCIEFMGETSBCONFIGINFO *PcieFmGetSbConfigInfo; ///< PcieFmGetSbConfigInfo |
| 231 | } PCIe_FAM_CONFIG_SERVICES; |
| 232 | |
| 233 | /// PCIe init services |
| 234 | typedef struct { |
| 235 | F_PCIEFMGETCORECONFIGURATIONVALUE *PcieFmGetCoreConfigurationValue; ///< PcieFmGetCoreConfigurationValue |
| 236 | F_PCIEFMGETLINKSPEEDCAP *PcieFmGetLinkSpeedCap; ///< PcieFmGetLinkSpeedCap |
| 237 | F_PCIEFMGETNATIVEPHYLANEBITMAP *PcieFmGetNativePhyLaneBitmap; ///< PcieFmGetNativePhyLaneBitmap |
| 238 | F_PCIEFMSETLINKSPEEDCAP *PcieFmSetLinkSpeedCap; ///< PcieFmSetLinkSpeedCap |
| 239 | } PCIe_FAM_INIT_SERVICES; |
| 240 | |
| 241 | ///PCIe debug services |
| 242 | typedef struct { |
| 243 | F_PCIEFMDEBUGGETHOSTREGADDRESSSPACESTRING *PcieFmDebugGetHostRegAddressSpaceString; ///< PcieFmGetCoreConfigurationValue |
| 244 | F_PCIEFMDEBUGGETWRAPPERNAMESTRING *PcieFmDebugGetWrapperNameString; ///< PcieFmDebugGetWrapperNameString |
| 245 | F_PCIEFMDEBUGGETCORECONFIGURATIONSTRING *PcieFmDebugGetCoreConfigurationString; ///< PcieFmDebugGetCoreConfigurationString |
| 246 | } PCIe_FAM_DEBUG_SERVICES; |
| 247 | |
| 248 | #endif |