zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * Config Fch Spi (Lpc) controller |
| 6 | * |
| 7 | * Init Spi (Lpc) Controller features. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: FCH |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
| 31 | * |
| 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | **************************************************************************** |
| 43 | */ |
| 44 | #include "FchPlatform.h" |
| 45 | #define FILECODE PROC_FCH_SPI_SPILATE_FILECODE |
| 46 | |
| 47 | /** |
| 48 | * FchInitLateSpi - Prepare Spi controller to boot to OS. |
| 49 | * |
| 50 | * @param[in] FchDataPtr Fch configuration structure pointer. |
| 51 | * |
| 52 | */ |
| 53 | VOID |
| 54 | FchInitLateSpi ( |
| 55 | IN VOID *FchDataPtr |
| 56 | ) |
| 57 | { |
| 58 | FchInitLateLpc (FchDataPtr); |
| 59 | } |
| 60 | |
| 61 | /** |
| 62 | * FchSpiUnlock - Fch SPI Unlock |
| 63 | * |
| 64 | * |
| 65 | * @param[in] FchDataPtr |
| 66 | * |
| 67 | */ |
| 68 | VOID |
| 69 | FchSpiUnlock ( |
| 70 | IN VOID *FchDataPtr |
| 71 | ) |
| 72 | { |
| 73 | UINT32 SpiRomBase; |
| 74 | FCH_DATA_BLOCK *LocalCfgPtr; |
| 75 | AMD_CONFIG_PARAMS *StdHeader; |
| 76 | |
| 77 | LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; |
| 78 | StdHeader = LocalCfgPtr->StdHeader; |
| 79 | SpiRomBase = LocalCfgPtr->Spi.RomBaseAddress; |
| 80 | |
| 81 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG50, AccessWidth32, (UINT32)~(BIT0 + BIT1), 0, StdHeader); |
| 82 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG54, AccessWidth32, (UINT32)~(BIT0 + BIT1), 0, StdHeader); |
| 83 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG58, AccessWidth32, (UINT32)~(BIT0 + BIT1), 0, StdHeader); |
| 84 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG5C, AccessWidth32, (UINT32)~(BIT0 + BIT1), 0, StdHeader); |
| 85 | RwMem (SpiRomBase + FCH_SPI_MMIO_REG00, AccessWidth32, (UINT32)~(BIT22 + BIT23), (UINT32)(BIT22 + BIT23)); |
| 86 | } |
| 87 | |
| 88 | /** |
| 89 | * FchSpiLock - Fch SPI lock |
| 90 | * |
| 91 | * |
| 92 | * @param[in] FchDataPtr |
| 93 | * |
| 94 | */ |
| 95 | VOID |
| 96 | FchSpiLock ( |
| 97 | IN VOID *FchDataPtr |
| 98 | ) |
| 99 | { |
| 100 | UINT32 SpiRomBase; |
| 101 | FCH_DATA_BLOCK *LocalCfgPtr; |
| 102 | AMD_CONFIG_PARAMS *StdHeader; |
| 103 | |
| 104 | LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; |
| 105 | StdHeader = LocalCfgPtr->StdHeader; |
| 106 | SpiRomBase = LocalCfgPtr->Spi.RomBaseAddress; |
| 107 | |
| 108 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG50, AccessWidth32, (UINT32)~(BIT0 + BIT1), (UINT32)(BIT0 + BIT1), StdHeader); |
| 109 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG54, AccessWidth32, (UINT32)~(BIT0 + BIT1), (UINT32)(BIT0 + BIT1), StdHeader); |
| 110 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG58, AccessWidth32, (UINT32)~(BIT0 + BIT1), (UINT32)(BIT0 + BIT1), StdHeader); |
| 111 | RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG5C, AccessWidth32, (UINT32)~(BIT0 + BIT1), (UINT32)(BIT0 + BIT1), StdHeader); |
| 112 | RwMem (SpiRomBase + FCH_SPI_MMIO_REG00, AccessWidth32, (UINT32)~(BIT22 + BIT23), 0); |
| 113 | } |