zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * Config Fch Sata controller |
| 6 | * |
| 7 | * Init Sata Controller features (PEI phase). |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: FCH |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
| 31 | * |
| 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | **************************************************************************** |
| 43 | */ |
| 44 | #include "FchPlatform.h" |
| 45 | #include "Filecode.h" |
| 46 | #define FILECODE PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATARESETSERVICE_FILECODE |
| 47 | |
| 48 | /** |
| 49 | * FchInitResetSataProgram - Config Sata controller during |
| 50 | * Power-On |
| 51 | * |
| 52 | * |
| 53 | * |
| 54 | * @param[in] FchDataPtr Fch configuration structure pointer. |
| 55 | * |
| 56 | */ |
| 57 | VOID |
| 58 | FchInitResetSataProgram ( |
| 59 | IN VOID *FchDataPtr |
| 60 | ) |
| 61 | { |
| 62 | UINT8 SataPortNum; |
| 63 | UINT8 PortStatusByte; |
| 64 | UINT8 EfuseByte; |
| 65 | UINT8 FchSataMode; |
| 66 | UINT8 FchSataInternal100Spread; |
| 67 | FCH_RESET_DATA_BLOCK *LocalCfgPtr; |
| 68 | AMD_CONFIG_PARAMS *StdHeader; |
| 69 | |
| 70 | LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr; |
| 71 | StdHeader = LocalCfgPtr->StdHeader; |
| 72 | |
| 73 | // |
| 74 | //FchSataMode = LocalCfgPtr->Sata.SATA_MODE.SataMode.SataModeReg; |
| 75 | //New structure need calculate Sata Register value |
| 76 | // |
| 77 | FchSataMode = 0; |
| 78 | if ( LocalCfgPtr->FchReset.SataEnable ) { |
| 79 | FchSataMode |= 0x01; |
| 80 | } |
| 81 | if ( LocalCfgPtr->Sata6AhciCap ) { |
| 82 | FchSataMode |= 0x02; |
| 83 | } |
| 84 | if ( LocalCfgPtr->SataSetMaxGen2 ) { |
| 85 | FchSataMode |= 0x04; |
| 86 | } |
| 87 | if ( LocalCfgPtr->FchReset.IdeEnable ) { |
| 88 | FchSataMode |= 0x08; |
| 89 | } |
| 90 | |
| 91 | FchSataMode |= (( LocalCfgPtr->SataClkMode ) << 4 ) ; |
| 92 | LocalCfgPtr->SataModeReg = FchSataMode; ///Save Back to Structure |
| 93 | |
| 94 | FchSataInternal100Spread = ( UINT8 ) LocalCfgPtr->SataInternal100Spread; |
| 95 | SataPortNum = 0; |
| 96 | |
| 97 | // |
| 98 | // Sata Workaround |
| 99 | // |
| 100 | for ( SataPortNum = 0; SataPortNum < 0x08; SataPortNum++ ) { |
| 101 | RwPci (((SATA_BUS_DEV_FUN << 16) + 0x040 + 2), AccessWidth8, 0xFF, 1 << SataPortNum, StdHeader); |
| 102 | FchStall (2, StdHeader); |
| 103 | RwPci (((SATA_BUS_DEV_FUN << 16) + 0x040 + 2), AccessWidth8, (0xFF ^ (1 << SataPortNum)) , 0x00, StdHeader); |
| 104 | FchStall (2, StdHeader); |
| 105 | } |
| 106 | |
| 107 | RwPci (((SATA_BUS_DEV_FUN << 16) + 0x084 + 3), AccessWidth8, (UINT32)~BIT2, 0, StdHeader); |
| 108 | RwPci (((SATA_BUS_DEV_FUN << 16) + 0x0A0 ), AccessWidth8, (UINT32)~(BIT2 + BIT3 + BIT4 + BIT5 + BIT6), BIT2 + BIT3 + BIT4 + BIT5, StdHeader); |
| 109 | |
| 110 | // |
| 111 | // Sata Setting for clock mode only |
| 112 | // |
| 113 | RwMem (ACPI_MMIO_BASE + PMIO_BASE + 0xDA , AccessWidth8, 0, FchSataMode); |
| 114 | |
| 115 | if ( FchSataInternal100Spread ) { |
| 116 | RwMem (ACPI_MMIO_BASE + MISC_BASE + 0x1E, AccessWidth8, 0xFF, BIT4); |
| 117 | RwPci (((SATA_BUS_DEV_FUN << 16) + 0x084 ), AccessWidth32, 0xFFFFFFFB, 0x00, StdHeader); |
| 118 | } else { |
| 119 | RwMem (ACPI_MMIO_BASE + MISC_BASE + 0x1E, AccessWidth8, (UINT32)~BIT4, 0x00); |
| 120 | } |
| 121 | |
| 122 | EfuseByte = SATA_FIS_BASE_EFUSE_LOC; |
| 123 | GetEfuseStatus (&EfuseByte, StdHeader); |
| 124 | |
| 125 | if (EfuseByte & BIT0) { |
| 126 | RwMem (ACPI_MMIO_BASE + PMIO_BASE + 0xDA , AccessWidth8, 0xFB, 0x04); |
| 127 | } |
| 128 | |
| 129 | ReadMem (ACPI_MMIO_BASE + PMIO_BASE + 0xDA , AccessWidth8, &PortStatusByte); |
| 130 | if ( ((PortStatusByte & 0xF0) == 0x10) ) { |
| 131 | RwMem (ACPI_MMIO_BASE + MISC_BASE + FCH_PMIOA_REG08, AccessWidth8, 0, BIT5); |
| 132 | } |
| 133 | |
| 134 | if ( FchSataInternal100Spread ) { |
| 135 | RwPci (((SATA_BUS_DEV_FUN << 16) + 0x084 ), AccessWidth32, 0xFFFFFFFF, 0x04, StdHeader); |
| 136 | } |
| 137 | } |
| 138 | |
| 139 | |