zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * Config Fch HwAcpi controller |
| 6 | * |
| 7 | * Init Spread Spectrum features. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: FCH |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
| 31 | * |
| 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | **************************************************************************** |
| 43 | */ |
| 44 | #include "FchPlatform.h" |
| 45 | #include "amdlib.h" |
| 46 | #include "cpuServices.h" |
| 47 | #include "Filecode.h" |
| 48 | #define FILECODE PROC_FCH_HWACPI_FAMILY_HUDSON2_HUDSON2SSSERVICE_FILECODE |
| 49 | |
| 50 | /** |
| 51 | * FchInitResetAcpiMmioTable - Fch ACPI MMIO initial |
| 52 | * during the power on stage. |
| 53 | * |
| 54 | * |
| 55 | * |
| 56 | * |
| 57 | */ |
Arthur Heymans | 8d3640d | 2022-05-16 12:27:36 +0200 | [diff] [blame] | 58 | CONST ACPI_REG_WRITE FchInitResetAcpiMmioTable[] = |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 59 | { |
| 60 | {00, 00, 0xB0, 0xAC}, /// Signature |
| 61 | {MISC_BASE >> 8, FCH_MISC_REG41, 0x1F, 0x40}, //keep Auxiliary_14Mclk_Sel [12] |
| 62 | // |
| 63 | // USB 3.0 Reference Clock MISC_REG 0x40 [4] = 0 Enable spread-spectrum reference clock. |
| 64 | // |
| 65 | {MISC_BASE >> 8, FCH_MISC_REG40, 0xEF, 0x00}, |
| 66 | |
| 67 | {PMIO_BASE >> 8, 0x5D , 0x00, BIT0}, |
| 68 | {PMIO_BASE >> 8, FCH_PMIOA_REGD2, 0xCF, BIT4 + BIT5}, |
| 69 | {SMBUS_BASE >> 8, FCH_SMBUS_REG12, 0x00, BIT0}, |
| 70 | {PMIO_BASE >> 8, 0x28 , 0xFF, BIT0 + BIT2}, |
| 71 | {PMIO_BASE >> 8, FCH_PMIOA_REG44 + 3, 0x67, 0}, /// Stop Boot timer |
| 72 | {PMIO_BASE >> 8, FCH_PMIOA_REG48, 0xFF, BIT0}, |
| 73 | {PMIO_BASE >> 8, FCH_PMIOA_REG00, 0xFF, 0x0E}, |
| 74 | {PMIO_BASE >> 8, 0x00 + 2, 0xFF, 0x40}, |
| 75 | {PMIO_BASE >> 8, 0x00 + 3, 0xFF, 0x08}, |
| 76 | {PMIO_BASE >> 8, FCH_PMIOA_REG34, 0xEF, BIT0 + BIT1}, |
| 77 | {PMIO_BASE >> 8, FCH_PMIOA_REGEC, 0xFD, BIT1}, |
| 78 | {PMIO_BASE >> 8, FCH_PMIOA_REG08, 0xFE, BIT2 + BIT4}, |
| 79 | {PMIO_BASE >> 8, 0x04 + 1, 0xFF, BIT0}, |
| 80 | {PMIO_BASE >> 8, FCH_PMIOA_REG54, 0x00, BIT4 + BIT6 + BIT7}, |
| 81 | {PMIO_BASE >> 8, 0x04 + 3, 0xFD, BIT1}, |
| 82 | {PMIO_BASE >> 8, FCH_PMIOA_REG74, 0xF6, BIT0 + BIT3}, |
| 83 | {PMIO_BASE >> 8, FCH_PMIOA_REGF0, (UINT8)~BIT2, 0x00}, |
| 84 | |
| 85 | // |
| 86 | // GEC I/O Termination Setting |
| 87 | // PM_Reg 0xF6 = Power-on default setting |
| 88 | // PM_Reg 0xF7 = Power-on default setting |
| 89 | // PM_Reg 0xF8 = 0x6C |
| 90 | // PM_Reg 0xF9 = 0x21 |
| 91 | // PM_Reg 0xFA = 0x00 Hudson-2 A12 GEC I/O Pad settings for 3.3V CMOS |
| 92 | // |
| 93 | {PMIO_BASE >> 8, FCH_PMIOA_REGF8, 0x00, 0x6C}, |
| 94 | {PMIO_BASE >> 8, FCH_PMIOA_REGF8 + 1, 0x00, 0x07}, |
| 95 | {PMIO_BASE >> 8, FCH_PMIOA_REGF8 + 2, 0x00, 0x00}, |
| 96 | // |
| 97 | // GEC -end |
| 98 | // |
| 99 | |
| 100 | {PMIO_BASE >> 8, FCH_PMIOA_REGC4, 0xee, 0x04}, /// Release NB_PCIE_RST |
| 101 | {PMIO_BASE >> 8, FCH_PMIOA_REGC0 + 2, 0xBF, 0x40}, |
| 102 | {PMIO_BASE >> 8, FCH_PMIOA_REGBE, 0xDF, BIT5}, |
| 103 | |
| 104 | // |
| 105 | // Enabling ClkRun Function |
| 106 | // |
| 107 | {PMIO_BASE >> 8, FCH_PMIOA_REGBB, 0xFF, BIT2}, |
| 108 | {PMIO_BASE >> 8, FCH_PMIOA_REGD0, (UINT8)~BIT2, 0}, |
| 109 | |
| 110 | {0xFF, 0xFF, 0xFF, 0xFF}, |
| 111 | }; |
| 112 | |
| 113 | /** |
| 114 | * ProgramFchHwAcpiResetP - Config SpreadSpectrum before PCI |
| 115 | * emulation |
| 116 | * |
| 117 | * |
| 118 | * |
| 119 | * @param[in] FchDataPtr Fch configuration structure pointer. |
| 120 | * |
| 121 | */ |
| 122 | VOID |
| 123 | ProgramFchHwAcpiResetP ( |
| 124 | IN VOID *FchDataPtr |
| 125 | ) |
| 126 | { |
| 127 | FCH_RESET_DATA_BLOCK *LocalCfgPtr; |
| 128 | AMD_CONFIG_PARAMS *StdHeader; |
| 129 | |
| 130 | LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr; |
| 131 | StdHeader = &((AMD_RESET_PARAMS *)FchDataPtr)->StdHeader; |
| 132 | |
| 133 | RwPmio (0xD3, AccessWidth8, (UINT32)~BIT4, 0, StdHeader); |
| 134 | RwPmio (0xD3, AccessWidth8, (UINT32)~BIT4, BIT4, StdHeader); |
| 135 | |
| 136 | if ( LocalCfgPtr->Cg2Pll == 1 ) { |
| 137 | TurnOffCG2 (); |
| 138 | LocalCfgPtr->SataClkMode = 0x0a; |
| 139 | } |
| 140 | } |