zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * AMD AGESA CPU Pstate Table Functions declarations. |
| 6 | * |
| 7 | * Contains code that declares the AGESA CPU _PSS related APIs |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: CPU/Feature |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ****************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 20 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 31 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | ****************************************************************************** |
| 43 | */ |
| 44 | |
| 45 | #ifndef _CPU_PSTATE_TABLES_H_ |
| 46 | #define _CPU_PSTATE_TABLES_H_ |
| 47 | |
| 48 | /*---------------------------------------------------------------------------------------- |
| 49 | * M I X E D (Definitions And Macros / Typedefs, Structures, Enums) |
| 50 | *---------------------------------------------------------------------------------------- |
| 51 | */ |
| 52 | // Forward declaration needed for multi-structure mutual references |
| 53 | AGESA_FORWARD_DECLARATION (PSTATE_CPU_FAMILY_SERVICES); |
| 54 | |
| 55 | /*---------------------------------------------------------------------------------------- |
| 56 | * D E F I N I T I O N S A N D M A C R O S |
| 57 | *---------------------------------------------------------------------------------------- |
| 58 | */ |
| 59 | |
| 60 | /*---------------------------------------------------------------------------------------- |
| 61 | * T Y P E D E F S A N D S T R U C T U R E S |
| 62 | *---------------------------------------------------------------------------------------- |
| 63 | */ |
| 64 | /// P-state structure for each state |
| 65 | typedef struct { |
| 66 | IN OUT UINT32 PStateEnable; ///< Pstate enable |
| 67 | IN OUT UINT32 CoreFreq; ///< MHz |
| 68 | IN OUT UINT32 Power; ///< milliWatts |
| 69 | IN OUT UINT32 IddValue; ///< Current value field |
| 70 | IN OUT UINT32 IddDiv; ///< Current divisor field |
| 71 | IN OUT UINT32 SwPstateNumber; ///< Software P-state number |
| 72 | } S_PSTATE_VALUES; |
| 73 | |
| 74 | /// P-state structure for each core |
| 75 | typedef struct { |
| 76 | IN OUT UINT8 PStateMaxValue; ///< Max p-state number in this core |
| 77 | IN OUT UINT8 HtcPstateLimit; ///< Htc limit |
| 78 | IN OUT UINT8 HtcCapable; ///< Htc capable |
| 79 | IN OUT UINT8 LocalApicId; ///< Local Apic Id |
| 80 | IN OUT UINT8 NumberOfBoostedStates; ///< Number of boost P-states |
Paul Menzel | ac63b41 | 2017-08-31 06:47:38 +0200 | [diff] [blame] | 81 | IN OUT S_PSTATE_VALUES PStateStruct[]; ///< P state struc |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 82 | } S_PSTATE; |
| 83 | |
| 84 | /// P-state structure for each node |
| 85 | typedef struct { |
| 86 | IN UINT8 SetPState0; ///< If value = 0x55 (Don't set PState0) |
| 87 | IN UINT8 TotalCoresInNode; ///< core number per node |
| 88 | IN UINT16 PStateLevelingSizeOfBytes; ///< Size |
| 89 | IN BOOLEAN OnlyOneEnabledPState; ///< Only P0 |
| 90 | IN UINT8 InitStruct; ///< Init struc |
| 91 | IN BOOLEAN AllCpusHaveIdenticalPStates; ///< Have Identical p state |
| 92 | IN UINT8 CreateAcpiTables; ///< Create table flag |
| 93 | IN UINT8 SocketNumber; ///< Physical socket number of this socket |
| 94 | IN UINT8 Reserved[2]; ///< Reserved. |
| 95 | IN OUT S_PSTATE PStateCoreStruct[1]; ///< P state core struc |
| 96 | } PSTATE_LEVELING; |
| 97 | |
| 98 | /// P-state structure for whole system |
| 99 | typedef struct { |
| 100 | IN OUT UINT32 TotalSocketInSystem; ///< Total node number in system |
| 101 | IN OUT UINT32 SizeOfBytes; ///< Structure size |
| 102 | IN OUT PSTATE_LEVELING PStateLevelingStruc[1]; ///< P state level structure |
| 103 | } S_CPU_AMD_PSTATE; |
| 104 | |
| 105 | /*---------------------------------------------------------------------------------------*/ |
| 106 | /** |
| 107 | * Family specific call to check if PSD need to be generated. |
| 108 | * |
| 109 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 110 | * @param[in,out] PlatformConfig Contains the runtime modifiable feature input data. |
| 111 | * @param[in] StdHeader Config Handle for library, services. |
| 112 | * |
| 113 | * @retval TRUE PSD need to be generated |
| 114 | * @retval FALSE PSD does NOT need to be generated |
| 115 | * |
| 116 | */ |
| 117 | typedef BOOLEAN F_PSTATE_PSD_IS_NEEDED ( |
| 118 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 119 | IN OUT PLATFORM_CONFIGURATION *PlatformConfig, |
| 120 | IN AMD_CONFIG_PARAMS *StdHeader |
| 121 | ); |
| 122 | |
| 123 | /// Reference to a Method. |
| 124 | typedef F_PSTATE_PSD_IS_NEEDED *PF_PSTATE_PSD_IS_NEEDED; |
| 125 | |
| 126 | |
| 127 | /*---------------------------------------------------------------------------------------*/ |
| 128 | /** |
| 129 | * Family specific call to check if Pstate PSD is dependent. |
| 130 | * |
| 131 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 132 | * @param[in,out] PlatformConfig Contains the runtime modifiable feature input data. |
| 133 | * @param[in] StdHeader Config Handle for library, services. |
| 134 | * |
| 135 | * @retval TRUE PSD is dependent. |
| 136 | * @retval FALSE PSD is independent. |
| 137 | * |
| 138 | */ |
| 139 | typedef BOOLEAN F_PSTATE_PSD_IS_DEPENDENT ( |
| 140 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 141 | IN OUT PLATFORM_CONFIGURATION *PlatformConfig, |
| 142 | IN AMD_CONFIG_PARAMS *StdHeader |
| 143 | ); |
| 144 | |
| 145 | /// Reference to a Method. |
| 146 | typedef F_PSTATE_PSD_IS_DEPENDENT *PF_PSTATE_PSD_IS_DEPENDENT; |
| 147 | |
| 148 | /** |
| 149 | * Family specific call to set core TscFreqSel. |
| 150 | * |
| 151 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 152 | * @param[in] StdHeader Config Handle for library, services. |
| 153 | * |
| 154 | */ |
| 155 | typedef VOID F_PSTATE_SET_TSC_FREQ_SEL ( |
| 156 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 157 | IN AMD_CONFIG_PARAMS *StdHeader |
| 158 | ); |
| 159 | |
| 160 | /// Reference to a Method. |
| 161 | typedef F_PSTATE_SET_TSC_FREQ_SEL *PF_PSTATE_SET_TSC_FREQ_SEL; |
| 162 | |
| 163 | /** |
| 164 | * Family specific call to get CPU pstate transition latency for current socket. |
| 165 | * |
| 166 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 167 | * @param[in] PStateLevelingBufferStructPtr Pstate row data buffer pointer. |
| 168 | * @param[in] PciAddress Pci address struct. |
| 169 | * @param[out] TransitionLatency Pstate Transition latency result. |
| 170 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 171 | * |
| 172 | */ |
| 173 | typedef AGESA_STATUS F_CPU_PSTATE_TRANSITION_LATENCY ( |
| 174 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 175 | IN PSTATE_LEVELING *PStateLevelingBufferStructPtr, |
| 176 | IN PCI_ADDR *PciAddress, |
| 177 | OUT UINT32 *TransitionLatency, |
| 178 | IN AMD_CONFIG_PARAMS *StdHeader |
| 179 | ); |
| 180 | |
| 181 | /// Reference to a Method. |
| 182 | typedef F_CPU_PSTATE_TRANSITION_LATENCY *PF_CPU_PSTATE_TRANSITION_LATENCY; |
| 183 | |
| 184 | /** |
| 185 | * Family specific call to get the desired P-state's frequency in megahertz. |
| 186 | * |
| 187 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 188 | * @param[in] StateNumber P-state number. |
| 189 | * @param[out] PowerInMw P-state frequency in megahertz. |
| 190 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 191 | * |
| 192 | */ |
| 193 | typedef AGESA_STATUS F_CPU_GET_PSTATE_FREQ ( |
| 194 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 195 | IN UINT8 StateNumber, |
| 196 | OUT UINT32 *FreqInMHz, |
| 197 | IN AMD_CONFIG_PARAMS *StdHeader |
| 198 | ); |
| 199 | |
| 200 | /// Reference to a Method. |
| 201 | typedef F_CPU_GET_PSTATE_FREQ *PF_CPU_GET_PSTATE_FREQ; |
| 202 | |
| 203 | /** |
| 204 | * Family specific call to set the system wide P-state settings on the current core. |
| 205 | * |
| 206 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 207 | * @param[in] CpuAmdPState The current core's P-state data. |
| 208 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 209 | * |
| 210 | */ |
| 211 | typedef AGESA_STATUS F_CPU_SET_PSTATE_LEVELING_REG ( |
| 212 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 213 | IN S_CPU_AMD_PSTATE *CpuAmdPState, |
| 214 | IN AMD_CONFIG_PARAMS *StdHeader |
| 215 | ); |
| 216 | |
| 217 | /// Reference to a Method. |
| 218 | typedef F_CPU_SET_PSTATE_LEVELING_REG *PF_CPU_SET_PSTATE_LEVELING_REG; |
| 219 | |
| 220 | /** |
| 221 | * Family specific call to get the desired P-state's rated power in milliwatts. |
| 222 | * |
| 223 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 224 | * @param[in] StateNumber P-state number. |
| 225 | * @param[out] PowerInMw P-state power in milliwatts. |
| 226 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 227 | * |
| 228 | */ |
| 229 | typedef AGESA_STATUS F_CPU_GET_PSTATE_POWER ( |
| 230 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 231 | IN UINT8 StateNumber, |
| 232 | OUT UINT32 *PowerInMw, |
| 233 | IN AMD_CONFIG_PARAMS *StdHeader |
| 234 | ); |
| 235 | |
| 236 | /// Reference to a Method. |
| 237 | typedef F_CPU_GET_PSTATE_POWER *PF_CPU_GET_PSTATE_POWER; |
| 238 | |
| 239 | /** |
| 240 | * Family specific call to get CPU Pstate Max State. |
| 241 | * |
| 242 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 243 | * @param[out] MaxPStateNumber The max hw pstate value on the current socket. |
| 244 | * @param[out] NumberOfBoostStates The number of boosted P-states on the current socket. |
| 245 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 246 | * |
| 247 | */ |
| 248 | typedef AGESA_STATUS F_CPU_GET_PSTATE_MAX_STATE ( |
| 249 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 250 | OUT UINT32 *MaxPStateNumber, |
| 251 | OUT UINT8 *NumberOfBoostStates, |
| 252 | IN AMD_CONFIG_PARAMS *StdHeader |
| 253 | ); |
| 254 | |
| 255 | /// Reference to a Method. |
| 256 | typedef F_CPU_GET_PSTATE_MAX_STATE *PF_CPU_GET_PSTATE_MAX_STATE; |
| 257 | |
| 258 | /** |
| 259 | * Family specific call to get CPU pstate register information. |
| 260 | * |
| 261 | * @param[in] PstateCpuFamilyServices Pstate CPU services. |
| 262 | * @param[in] PState Input hardware Pstate number for query. |
| 263 | * @param[out] PStateEnabled Boolean flag return pstate enable. |
| 264 | * @param[in,out] IddVal Pstate current value. |
| 265 | * @param[in,out] IddDiv Pstate current divisor. |
| 266 | * @param[out] SwPstateNumber Software P-state number. |
| 267 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 268 | * |
| 269 | */ |
| 270 | typedef AGESA_STATUS F_CPU_GET_PSTATE_REGISTER_INFO ( |
| 271 | IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, |
| 272 | IN UINT32 PState, |
| 273 | OUT BOOLEAN *PStateEnabled, |
| 274 | IN OUT UINT32 *IddVal, |
| 275 | IN OUT UINT32 *IddDiv, |
| 276 | OUT UINT32 *SwPstateNumber, |
| 277 | IN AMD_CONFIG_PARAMS *StdHeader |
| 278 | ); |
| 279 | |
| 280 | /// Reference to a Method. |
| 281 | typedef F_CPU_GET_PSTATE_REGISTER_INFO *PF_CPU_GET_PSTATE_REGISTER_INFO; |
| 282 | |
| 283 | /** |
| 284 | * Provide the interface to the Pstate dependent Family Specific Services. |
| 285 | * |
| 286 | * Use the methods or data in this struct to adapt the feature code to a specific cpu family or model (or stepping!). |
| 287 | * Each supported Family must provide an implementation for all methods in this interface, even if the |
| 288 | * implementation is a CommonReturn(). |
| 289 | */ |
| 290 | struct _PSTATE_CPU_FAMILY_SERVICES { |
| 291 | UINT16 Revision; ///< Interface version |
| 292 | // Public Methods. |
| 293 | PF_PSTATE_PSD_IS_NEEDED IsPstatePsdNeeded; ///< Method: Family specific call to check if PSD need to be generated. |
| 294 | PF_PSTATE_PSD_IS_DEPENDENT IsPstatePsdDependent; ///< Method: Family specific call to check if PSD is dependent. |
| 295 | PF_PSTATE_SET_TSC_FREQ_SEL CpuSetTscFreqSel; ///< Method: Family specific call to set core TscFreqSel. |
| 296 | PF_CPU_PSTATE_TRANSITION_LATENCY GetPstateLatency; ///< Method: Family specific call to get pstate transition latency. |
| 297 | PF_CPU_GET_PSTATE_FREQ GetPstateFrequency; ///< Method: Family specific call to get the desired P-state's frequency in megahertz. |
| 298 | PF_CPU_SET_PSTATE_LEVELING_REG SetPStateLevelReg; ///< Method: Family specific call to set the system wide P-state settings on the current core. |
| 299 | PF_CPU_GET_PSTATE_POWER GetPstatePower; ///< Method: Family specific call to get the desired P-state's rated power in milliwatts. |
| 300 | PF_CPU_GET_PSTATE_MAX_STATE GetPstateMaxState; ///< Method: Family specific call to get pstate max state number. |
| 301 | PF_CPU_GET_PSTATE_REGISTER_INFO GetPstateRegisterInfo; ///< Method: Family specific call to get pstate register information. |
| 302 | }; |
| 303 | |
| 304 | |
| 305 | /*---------------------------------------------------------------------------------------- |
| 306 | * F U N C T I O N S P R O T O T Y P E |
| 307 | *---------------------------------------------------------------------------------------- |
| 308 | */ |
| 309 | AGESA_STATUS |
| 310 | PStateGatherData ( |
| 311 | IN PLATFORM_CONFIGURATION *PlatformConfig, |
| 312 | IN OUT S_CPU_AMD_PSTATE *PStateStrucPtr, |
| 313 | IN AMD_CONFIG_PARAMS *StdHeader |
| 314 | ); |
| 315 | |
| 316 | AGESA_STATUS |
| 317 | PStateLeveling ( |
| 318 | IN OUT S_CPU_AMD_PSTATE *PStateStrucPtr, |
| 319 | IN AMD_CONFIG_PARAMS *StdHeader |
| 320 | ); |
| 321 | |
| 322 | AGESA_STATUS |
| 323 | CpuGetPStateLevelStructure ( |
| 324 | OUT PSTATE_LEVELING **PStateBufferPtr, |
| 325 | IN S_CPU_AMD_PSTATE *CpuAmdPState, |
| 326 | IN UINT32 LogicalSocketNumber, |
| 327 | IN AMD_CONFIG_PARAMS *StdHeader |
| 328 | ); |
| 329 | |
| 330 | #endif // _CPU_PSTATE_TABLES_H_ |