zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * AMD AGESA CPU create Pstate HPC mode support code. |
| 6 | * |
| 7 | * Contains code that declares the AGESA CPU Pstate HPC mode related APIs |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: CPU/Feature |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ****************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 20 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 31 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | ****************************************************************************** |
| 43 | */ |
| 44 | |
| 45 | /*---------------------------------------------------------------------------------------- |
| 46 | * M O D U L E S U S E D |
| 47 | *---------------------------------------------------------------------------------------- |
| 48 | */ |
| 49 | #include "AGESA.h" |
| 50 | #include "GeneralServices.h" |
| 51 | #include "cpuFamilyTranslation.h" |
| 52 | #include "cpuApicUtilities.h" |
| 53 | #include "OptionMultiSocket.h" |
| 54 | #include "cpuRegisters.h" |
| 55 | #include "cpuApicUtilities.h" |
| 56 | #include "cpuFeatures.h" |
| 57 | #include "cpuPstateHpcMode.h" |
| 58 | #include "Filecode.h" |
| 59 | CODE_GROUP (G1_PEICC) |
| 60 | RDATA_GROUP (G1_PEICC) |
| 61 | |
| 62 | #define FILECODE PROC_CPU_FEATURE_CPUPSTATEHPCMODE_FILECODE |
| 63 | |
| 64 | /*---------------------------------------------------------------------------------------- |
| 65 | * D E F I N I T I O N S A N D M A C R O S |
| 66 | *---------------------------------------------------------------------------------------- |
| 67 | */ |
| 68 | |
| 69 | /*---------------------------------------------------------------------------------------- |
| 70 | * T Y P E D E F S A N D S T R U C T U R E S |
| 71 | *---------------------------------------------------------------------------------------- |
| 72 | */ |
| 73 | |
| 74 | /*---------------------------------------------------------------------------------------- |
| 75 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 76 | *---------------------------------------------------------------------------------------- |
| 77 | */ |
| 78 | VOID |
| 79 | STATIC |
| 80 | EnablePstateHpcModeOnAps ( |
| 81 | IN VOID *PlatformConfig, |
| 82 | IN AMD_CONFIG_PARAMS *StdHeader |
| 83 | ); |
| 84 | |
| 85 | /*---------------------------------------------------------------------------------------- |
| 86 | * E X P O R T E D F U N C T I O N S |
| 87 | *---------------------------------------------------------------------------------------- |
| 88 | */ |
| 89 | extern CPU_FAMILY_SUPPORT_TABLE PstateHpcModeFamilyServiceTable; |
| 90 | |
| 91 | /*---------------------------------------------------------------------------------------*/ |
| 92 | /** |
| 93 | * Should P-state HPC mode be enabled |
| 94 | * If PlatformConfig->PStatesInHpcMode is TRUE, return TRUE, otherwise reture FALSE |
| 95 | * |
| 96 | * @param[in] PlatformConfig Contains the runtime modifiable feature input data. |
| 97 | * @param[in] StdHeader Config Handle for library, services. |
| 98 | * |
| 99 | * @retval TRUE P-state HPC mode is supported. |
| 100 | * @retval FALSE P-state HPC mode cannot be enabled. |
| 101 | * |
| 102 | */ |
| 103 | BOOLEAN |
| 104 | STATIC |
| 105 | IsPstateHpcModeFeatureSupported ( |
| 106 | IN PLATFORM_CONFIGURATION *PlatformConfig, |
| 107 | IN AMD_CONFIG_PARAMS *StdHeader |
| 108 | ) |
| 109 | { |
| 110 | BOOLEAN IsEnabled; |
| 111 | UINT32 Socket; |
| 112 | PSTATE_HPC_MODE_FAMILY_SERVICES *FamilyServices; |
| 113 | |
| 114 | IsEnabled = TRUE; |
| 115 | |
| 116 | if (PlatformConfig->PStatesInHpcMode) { |
| 117 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 118 | if (IsProcessorPresent (Socket, StdHeader)) { |
| 119 | GetFeatureServicesOfSocket (&PstateHpcModeFamilyServiceTable, Socket, (CONST VOID **)&FamilyServices, StdHeader); |
| 120 | if (FamilyServices == NULL) { |
| 121 | IsEnabled = FALSE; |
| 122 | break; |
| 123 | } |
| 124 | } |
| 125 | } |
| 126 | } else { |
| 127 | IsEnabled = FALSE; |
| 128 | } |
| 129 | return IsEnabled; |
| 130 | } |
| 131 | |
| 132 | |
| 133 | /*---------------------------------------------------------------------------------------*/ |
| 134 | /** |
| 135 | * Enable high performance computing (HPC mode) |
| 136 | * |
| 137 | * @param[in] EntryPoint Timepoint designator. |
| 138 | * @param[in] PlatformConfig Contains the runtime modifiable feature input data. |
| 139 | * @param[in] StdHeader Config Handle for library, services. |
| 140 | * |
| 141 | * @retval AGESA_SUCCESS Always succeeds. |
| 142 | * |
| 143 | */ |
| 144 | AGESA_STATUS |
| 145 | STATIC |
| 146 | InitializePstateHpcModeFeature ( |
| 147 | IN UINT64 EntryPoint, |
| 148 | IN PLATFORM_CONFIGURATION *PlatformConfig, |
| 149 | IN AMD_CONFIG_PARAMS *StdHeader |
| 150 | ) |
| 151 | { |
| 152 | UINT32 BscSocket; |
| 153 | UINT32 Ignored; |
| 154 | UINT32 BscCoreNum; |
| 155 | UINT32 Core; |
| 156 | UINT32 Socket; |
| 157 | UINT32 NumberOfSockets; |
| 158 | UINT32 NumberOfCores; |
| 159 | AP_TASK TaskPtr; |
| 160 | AGESA_STATUS IgnoredSts; |
| 161 | |
| 162 | if (!IsWarmReset (StdHeader)) { |
| 163 | IDS_HDT_CONSOLE (CPU_TRACE, " P-state HPC mode is enabled\n"); |
| 164 | |
| 165 | IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts); |
| 166 | NumberOfSockets = GetPlatformNumberOfSockets (); |
| 167 | |
| 168 | TaskPtr.FuncAddress.PfApTaskI = EnablePstateHpcModeOnAps; |
| 169 | TaskPtr.DataTransfer.DataSizeInDwords = 2; |
| 170 | TaskPtr.DataTransfer.DataPtr = PlatformConfig; |
| 171 | TaskPtr.DataTransfer.DataTransferFlags = 0; |
| 172 | TaskPtr.ExeFlags = WAIT_FOR_CORE; |
| 173 | |
| 174 | for (Socket = 0; Socket < NumberOfSockets; Socket++) { |
| 175 | if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) { |
| 176 | for (Core = 0; Core < NumberOfCores; Core++) { |
| 177 | if ((Socket != BscSocket) || (Core != BscCoreNum)) { |
| 178 | ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) Core, &TaskPtr, StdHeader); |
| 179 | } |
| 180 | } |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | EnablePstateHpcModeOnAps (PlatformConfig, StdHeader); |
| 185 | } |
| 186 | return AGESA_SUCCESS; |
| 187 | } |
| 188 | |
| 189 | /*---------------------------------------------------------------------------------------*/ |
| 190 | /** |
| 191 | * AP task to enable Pstate HPC mode |
| 192 | * |
| 193 | * @param[in] PlatformConfig Contains the runtime modifiable feature input data. |
| 194 | * @param[in] StdHeader Config Handle for library, services. |
| 195 | * |
| 196 | */ |
| 197 | VOID |
| 198 | STATIC |
| 199 | EnablePstateHpcModeOnAps ( |
| 200 | IN VOID *PlatformConfig, |
| 201 | IN AMD_CONFIG_PARAMS *StdHeader |
| 202 | ) |
| 203 | { |
| 204 | PSTATE_HPC_MODE_FAMILY_SERVICES *FamilyServices; |
| 205 | |
| 206 | GetFeatureServicesOfCurrentCore (&PstateHpcModeFamilyServiceTable, (CONST VOID **)&FamilyServices, StdHeader); |
| 207 | FamilyServices->EnablePstateHpcMode (FamilyServices, |
| 208 | PlatformConfig, |
| 209 | StdHeader); |
| 210 | |
| 211 | } |
| 212 | |
| 213 | |
| 214 | CONST CPU_FEATURE_DESCRIPTOR ROMDATA CpuFeaturePstateHpcMode = |
| 215 | { |
| 216 | PstateHpcMode, |
| 217 | (CPU_FEAT_BEFORE_RELINQUISH_AP | CPU_FEAT_AFTER_RESUME_MTRR_SYNC), |
| 218 | IsPstateHpcModeFeatureSupported, |
| 219 | InitializePstateHpcModeFeature |
| 220 | }; |