zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * AMD Family_15 specific utility functions. |
| 6 | * |
| 7 | * Provides numerous utility functions specific to family 15h. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: CPU/Family/0x15 |
| 12 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 18 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 20 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
| 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
| 30 | * from this software without specific prior written permission. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 31 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 42 | ****************************************************************************** |
| 43 | */ |
| 44 | |
| 45 | /*---------------------------------------------------------------------------------------- |
| 46 | * M O D U L E S U S E D |
| 47 | *---------------------------------------------------------------------------------------- |
| 48 | */ |
| 49 | #include "AGESA.h" |
| 50 | #include "amdlib.h" |
| 51 | #include "Ids.h" |
| 52 | #include "cpuRegisters.h" |
| 53 | #include "cpuServices.h" |
| 54 | #include "GeneralServices.h" |
| 55 | #include "cpuApicUtilities.h" |
| 56 | #include "cpuFamilyTranslation.h" |
| 57 | #include "cpuCommonF15Utilities.h" |
| 58 | #include "cpuF15PowerMgmt.h" |
| 59 | #include "Filecode.h" |
| 60 | CODE_GROUP (G2_PEI) |
| 61 | RDATA_GROUP (G2_PEI) |
| 62 | |
| 63 | #define FILECODE PROC_CPU_FAMILY_0X15_CPUCOMMONF15UTILITIES_FILECODE |
| 64 | |
| 65 | |
| 66 | /*---------------------------------------------------------------------------------------- |
| 67 | * D E F I N I T I O N S A N D M A C R O S |
| 68 | *---------------------------------------------------------------------------------------- |
| 69 | */ |
| 70 | |
| 71 | /*---------------------------------------------------------------------------------------- |
| 72 | * T Y P E D E F S A N D S T R U C T U R E S |
| 73 | *---------------------------------------------------------------------------------------- |
| 74 | */ |
| 75 | |
| 76 | /*---------------------------------------------------------------------------------------- |
| 77 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 78 | *---------------------------------------------------------------------------------------- |
| 79 | */ |
| 80 | |
| 81 | /*---------------------------------------------------------------------------------------- |
| 82 | * E X P O R T E D F U N C T I O N S |
| 83 | *---------------------------------------------------------------------------------------- |
| 84 | */ |
| 85 | |
| 86 | /*---------------------------------------------------------------------------------------*/ |
| 87 | /** |
| 88 | * Set warm reset status and count |
| 89 | * |
| 90 | * @CpuServiceMethod{::F_CPU_SET_WARM_RESET_FLAG}. |
| 91 | * |
| 92 | * This function will use bit9, and bit 10 of register F0x6C as a warm reset status and count. |
| 93 | * |
| 94 | * @param[in] FamilySpecificServices The current Family Specific Services. |
| 95 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 96 | * @param[in] Request Indicate warm reset status |
| 97 | * |
| 98 | */ |
| 99 | VOID |
| 100 | F15SetAgesaWarmResetFlag ( |
| 101 | IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, |
| 102 | IN AMD_CONFIG_PARAMS *StdHeader, |
| 103 | IN WARM_RESET_REQUEST *Request |
| 104 | ) |
| 105 | { |
| 106 | PCI_ADDR PciAddress; |
| 107 | UINT32 PciData; |
| 108 | |
| 109 | PciAddress.AddressValue = MAKE_SBDFO (0, 0 , PCI_DEV_BASE, FUNC_0, HT_INIT_CTRL); |
| 110 | LibAmdPciRead (AccessWidth32, PciAddress, &PciData, StdHeader); |
| 111 | |
| 112 | // bit[5] - indicate a warm reset is or is not required |
| 113 | PciData &= ~(HT_INIT_BIOS_RST_DET_0); |
| 114 | PciData = PciData | (Request->RequestBit << 5); |
| 115 | |
| 116 | // bit[10,9] - indicate warm reset status and count |
| 117 | PciData &= ~(HT_INIT_BIOS_RST_DET_1 | HT_INIT_BIOS_RST_DET_2); |
| 118 | PciData |= Request->StateBits << 9; |
| 119 | |
| 120 | LibAmdPciWrite (AccessWidth32, PciAddress, &PciData, StdHeader); |
| 121 | } |
| 122 | |
| 123 | /*---------------------------------------------------------------------------------------*/ |
| 124 | /** |
| 125 | * Get warm reset status and count |
| 126 | * |
| 127 | * @CpuServiceMethod{::F_CPU_GET_WARM_RESET_FLAG}. |
| 128 | * |
| 129 | * This function will bit9, and bit 10 of register F0x6C as a warm reset status and count. |
| 130 | * |
| 131 | * @param[in] FamilySpecificServices The current Family Specific Services. |
| 132 | * @param[in] StdHeader Config handle for library and services |
| 133 | * @param[out] Request Indicate warm reset status |
| 134 | * |
| 135 | */ |
| 136 | VOID |
| 137 | F15GetAgesaWarmResetFlag ( |
| 138 | IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, |
| 139 | IN AMD_CONFIG_PARAMS *StdHeader, |
| 140 | OUT WARM_RESET_REQUEST *Request |
| 141 | ) |
| 142 | { |
| 143 | PCI_ADDR PciAddress; |
| 144 | UINT32 PciData; |
| 145 | |
| 146 | PciAddress.AddressValue = MAKE_SBDFO (0, 0 , PCI_DEV_BASE, FUNC_0, HT_INIT_CTRL); |
| 147 | LibAmdPciRead (AccessWidth32, PciAddress, &PciData, StdHeader); |
| 148 | |
| 149 | // bit[5] - indicate a warm reset is or is not required |
| 150 | Request->RequestBit = (UINT8) ((PciData & HT_INIT_BIOS_RST_DET_0) >> 5); |
| 151 | // bit[10,9] - indicate warm reset status and count |
| 152 | Request->StateBits = (UINT8) ((PciData & (HT_INIT_BIOS_RST_DET_1 | HT_INIT_BIOS_RST_DET_2)) >> 9); |
| 153 | } |
| 154 | |
| 155 | /*---------------------------------------------------------------------------------------*/ |
| 156 | /** |
| 157 | * Return a number zero or one, based on the Core ID position in the initial APIC Id. |
| 158 | * |
| 159 | * @CpuServiceMethod{::F_CORE_ID_POSITION_IN_INITIAL_APIC_ID}. |
| 160 | * |
| 161 | * @param[in] FamilySpecificServices The current Family Specific Services. |
| 162 | * @param[in] StdHeader Handle of Header for calling lib functions and services. |
| 163 | * |
| 164 | * @retval CoreIdPositionZero Core Id is not low |
| 165 | * @retval CoreIdPositionOne Core Id is low |
| 166 | */ |
| 167 | CORE_ID_POSITION |
| 168 | F15CpuAmdCoreIdPositionInInitialApicId ( |
| 169 | IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, |
| 170 | IN AMD_CONFIG_PARAMS *StdHeader |
| 171 | ) |
| 172 | { |
| 173 | UINT64 InitApicIdCpuIdLo; |
| 174 | |
| 175 | // Check bit_54 [InitApicIdCpuIdLo] to find core id position. |
| 176 | LibAmdMsrRead (MSR_NB_CFG, &InitApicIdCpuIdLo, StdHeader); |
| 177 | InitApicIdCpuIdLo = ((InitApicIdCpuIdLo & BIT54) >> 54); |
| 178 | return ((InitApicIdCpuIdLo == 0) ? CoreIdPositionZero : CoreIdPositionOne); |
| 179 | } |
| 180 | |