zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * Create outline and references for Build Configuration and Options Component mainpage documentation. |
| 6 | * |
| 7 | * Design guides, maintenance guides, and general documentation, are |
| 8 | * collected using this file onto the documentation mainpage. |
| 9 | * This file contains doxygen comment blocks, only. |
| 10 | * |
| 11 | * @xrefitem bom "File Content Label" "Release Content" |
| 12 | * @e project: AGESA |
| 13 | * @e sub-project: Documentation |
| 14 | * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| 15 | * |
| 16 | */ |
| 17 | /* |
| 18 | ****************************************************************************** |
| 19 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 20 | * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. |
| 21 | * All rights reserved. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 22 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 23 | * Redistribution and use in source and binary forms, with or without |
| 24 | * modification, are permitted provided that the following conditions are met: |
| 25 | * * Redistributions of source code must retain the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer. |
| 27 | * * Redistributions in binary form must reproduce the above copyright |
| 28 | * notice, this list of conditions and the following disclaimer in the |
| 29 | * documentation and/or other materials provided with the distribution. |
| 30 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 31 | * its contributors may be used to endorse or promote products derived |
| 32 | * from this software without specific prior written permission. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 33 | * |
Siyuan Wang | 641f00c | 2013-06-08 11:50:55 +0800 | [diff] [blame] | 34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 35 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 36 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 37 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 38 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 39 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 40 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 41 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 42 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 43 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
zbao | 7d94cf9 | 2012-07-02 14:19:14 +0800 | [diff] [blame] | 44 | ****************************************************************************** |
| 45 | */ |
| 46 | |
| 47 | /** |
| 48 | * @page optionmain Build Configuration and Options Documentation |
| 49 | * |
| 50 | * Additional documentation for the Build Configuration and Options component consists of |
| 51 | * |
| 52 | * - Introduction and Overview to Build Options |
| 53 | * - @subpage platforminstall "Platform Build Options" |
| 54 | * - @subpage bldcfg "Build Configuration Item Cross Reference" |
| 55 | * - @subpage examplecustomizations "Customization Examples" |
| 56 | * - Maintenance Guides: |
| 57 | * - For debug of the Options system, use compiler options |
| 58 | * @n <tt> /P /EP /C /FAs </tt> @n |
| 59 | * PreProcessor output is produced in an .i file in the directory where the project |
| 60 | * file is located. |
| 61 | * - Design Guides: |
| 62 | * - add here >>> |
| 63 | * |
| 64 | */ |
| 65 | |
| 66 | /** |
| 67 | * @page platforminstall Platform Build Options. |
| 68 | * |
| 69 | * Build options are boolean constants. The purpose of build options is to remove code |
| 70 | * from the build to reduce the overall code size present in the ROM image. Unless |
| 71 | * otherwise specified, the default action is to include all options. If a build option is |
| 72 | * not specifically listed as disabled, then it is included into the build. |
| 73 | * |
| 74 | * The documented build options are imported from a user controlled file for |
| 75 | * processing. The build options for all platform solutions are listed below: |
| 76 | * |
| 77 | * @anchor BLDOPT_REMOVE_UDIMMS_SUPPORT |
| 78 | * @li @e BLDOPT_REMOVE_UDIMMS_SUPPORT @n |
| 79 | * If unbuffered DIMMs are NOT expected to be required in the system, the code that |
| 80 | * handles unbuffered DIMMs can be removed from the build. |
| 81 | * |
| 82 | * @anchor BLDOPT_REMOVE_RDIMMS_SUPPORT |
| 83 | * @li @e BLDOPT_REMOVE_RDIMMS_SUPPORT @n |
| 84 | * If registered DIMMs are NOT expected to be required in the system, the code |
| 85 | * that handles registered DIMMs can be removed from the build. |
| 86 | * |
| 87 | * @anchor BLDOPT_REMOVE_LRDIMMS_SUPPORT |
| 88 | * @li @e BLDOPT_REMOVE_LRDIMMS_SUPPORT @n |
| 89 | * If Load Reduced DIMMs are NOT expected to be required in the system, the code |
| 90 | * that handles Load Reduced DIMMs can be removed from the build. |
| 91 | * |
| 92 | * @note The above three options operate independently from each other; however, at |
| 93 | * least one of the unbuffered , registered or load reduced DIMM options must be present in the build. |
| 94 | * |
| 95 | * @anchor BLDOPT_REMOVE_ECC_SUPPORT |
| 96 | * @li @e BLDOPT_REMOVE_ECC_SUPPORT @n |
| 97 | * Use this option to remove the code for Error Checking & Correction. |
| 98 | * |
| 99 | * @anchor BLDOPT_REMOVE_BANK_INTERLEAVE |
| 100 | * @li @e BLDOPT_REMOVE_BANK_INTERLEAVE @n |
| 101 | * Interleaving is a mechanism to do performance fine tuning. This option |
| 102 | * interleaves memory between banks on a DIMM. |
| 103 | * |
| 104 | * @anchor BLDOPT_REMOVE_DCT_INTERLEAVE |
| 105 | * @li @e BLDOPT_REMOVE_DCT_INTERLEAVE @n |
| 106 | * Interleaving is a mechanism to do performance fine tuning. This option |
| 107 | * interleaves memory from two DRAM controllers. |
| 108 | * |
| 109 | * @anchor BLDOPT_REMOVE_NODE_INTERLEAVE |
| 110 | * @li @e BLDOPT_REMOVE_NODE_INTERLEAVE @n |
| 111 | * Interleaving is a mechanism to do performance fine tuning. This option |
| 112 | * interleaves memory from two HyperTransport nodes. |
| 113 | * |
| 114 | * @anchor BLDOPT_REMOVE_PARALLEL_TRAINING |
| 115 | * @li @e BLDOPT_REMOVE_PARALLEL_TRAINING @n |
| 116 | * For multi-socket systems, training memory in parallel can reduce the time |
| 117 | * needed to boot. |
| 118 | * |
| 119 | * @anchor BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT |
| 120 | * @li @e BLDOPT_REMOVE_ONLINE_SPARE_SUPPORT @n |
| 121 | * Online Spare support is removed by this option. |
| 122 | * |
| 123 | * @anchor BLDOPT_REMOVE_MULTISOCKET_SUPPORT |
| 124 | * @li @e BLDOPT_REMOVE_MULTISOCKET_SUPPORT @n |
| 125 | * Many systems use only a single socket and may benefit in code space to remove |
| 126 | * this code. However, certain processors have multiple HyperTransport nodes |
| 127 | * within a single socket. For these processors, the multi-node support is |
| 128 | * required and this option has no effect. |
| 129 | * |
| 130 | * @anchor BLDOPT_REMOVE_ACPI_PSTATES |
| 131 | * @li @e BLDOPT_REMOVE_ACPI_PSTATES @n |
| 132 | * This option removes the code that generates the ACPI tables used in power |
| 133 | * management. |
| 134 | * |
| 135 | * @anchor BLDCFG_PSTATE_HPC_MODE |
| 136 | * @li @e BLDCFG_PSTATE_HPC_MODE @n |
| 137 | * This option enables PStates high performance computing mode (HPC mode) |
| 138 | * |
| 139 | * |
| 140 | * @anchor BLDOPT_REMOVE_SRAT |
| 141 | * @li @e BLDOPT_REMOVE_SRAT @n |
| 142 | * This option removes the code that generates the SRAT tables used in performance |
| 143 | * tuning. |
| 144 | * |
| 145 | * @anchor BLDOPT_REMOVE_SLIT |
| 146 | * @li @e BLDOPT_REMOVE_SLIT @n |
| 147 | * This option removes the code that generates the SLIT tables used in performance |
| 148 | * tuning. |
| 149 | * |
| 150 | * @anchor BLDOPT_REMOVE_WHEA |
| 151 | * @li @e BLDOPT_REMOVE_WHEA @n |
| 152 | * This option removes the code that generates the WHEA tables used in error |
| 153 | * handling and reporting. |
| 154 | * |
| 155 | * @anchor BLDOPT_REMOVE_DMI |
| 156 | * @li @e BLDOPT_REMOVE_DMI @n |
| 157 | * This option removes the code that generates the DMI tables used in system |
| 158 | * management. |
| 159 | * |
| 160 | * @anchor BLDOPT_REMOVE_DQS_TRAINING |
| 161 | * @li @e BLDOPT_REMOVE_DQS_TRAINING @n |
| 162 | * This option removes the code used in memory performance tuning. |
| 163 | * |
| 164 | * |
| 165 | * @anchor BLDOPT_REMOVE_HT_ASSIST |
| 166 | * @li @e BLDOPT_REMOVE_HT_ASSIST @n |
| 167 | * This option removes the code which implements the HT Assist feature. |
| 168 | * |
| 169 | * @anchor BLDOPT_REMOVE_ATM_MODE |
| 170 | * @li @e BLDOPT_REMOVE_ATM_MODE @n |
| 171 | * This option removes the code which implements the ATM feature. |
| 172 | * |
| 173 | * @anchor BLDOPT_REMOVE_MSG_BASED_C1E |
| 174 | * @li @e BLDOPT_REMOVE_MSG_BASED_C1E @n |
| 175 | * This option removes the code which implements the Message Based C1e feature. |
| 176 | * |
| 177 | * @anchor BLDOPT_REMOVE_C6_STATE |
| 178 | * @li @e BLDOPT_REMOVE_C6_STATE @n |
| 179 | * This option removes the code which implements the C6 C-state feature. |
| 180 | * |
| 181 | * @anchor BLDOPT_REMOVE_MEM_RESTORE_SUPPORT |
| 182 | * @li @e BLDOPT_REMOVE_MEM_RESTORE_SUPPORT @n |
| 183 | * This option removes the memory context restore feature. |
| 184 | * |
| 185 | * @anchor BLDOPT_REMOVE_FAMILY_10_SUPPORT |
| 186 | * @li @e BLDOPT_REMOVE_FAMILY_10_SUPPORT @n |
| 187 | * If the package contains support for family 10h processors, remove that support. |
| 188 | * |
| 189 | * @anchor BLDOPT_REMOVE_FAMILY_12_SUPPORT |
| 190 | * @li @e BLDOPT_REMOVE_FAMILY_12_SUPPORT @n |
| 191 | * If the package contains support for family 10h processors, remove that support. |
| 192 | * |
| 193 | * @anchor BLDOPT_REMOVE_FAMILY_14_SUPPORT |
| 194 | * @li @e BLDOPT_REMOVE_FAMILY_14_SUPPORT @n |
| 195 | * If the package contains support for family 14h processors, remove that support. |
| 196 | * |
| 197 | * @anchor BLDOPT_REMOVE_FAMILY_15_SUPPORT |
| 198 | * @li @e BLDOPT_REMOVE_FAMILY_15_SUPPORT @n |
| 199 | * If the package contains support for family 15h processors, remove that support. |
| 200 | * |
| 201 | * @anchor BLDOPT_REMOVE_AM3_SOCKET_SUPPORT |
| 202 | * @li @e BLDOPT_REMOVE_AM3_SOCKET_SUPPORT @n |
| 203 | * This option removes the code which implements support for processors packaged for AM3 sockets. |
| 204 | * |
| 205 | * @anchor BLDOPT_REMOVE_ASB2_SOCKET_SUPPORT |
| 206 | * @li @e BLDOPT_REMOVE_ASB2_SOCKET_SUPPORT @n |
| 207 | * This option removes the code which implements support for processors packaged for ASB2 sockets. |
| 208 | * |
| 209 | * @anchor BLDOPT_REMOVE_C32_SOCKET_SUPPORT |
| 210 | * @li @e BLDOPT_REMOVE_C32_SOCKET_SUPPORT @n |
| 211 | * This option removes the code which implements support for processors packaged for C32 sockets. |
| 212 | * |
| 213 | * @anchor BLDOPT_REMOVE_FM1_SOCKET_SUPPORT |
| 214 | * @li @e BLDOPT_REMOVE_FM1_SOCKET_SUPPORT @n |
| 215 | * This option removes the code which implements support for processors packaged for FM1 sockets. |
| 216 | * |
| 217 | * @anchor BLDOPT_REMOVE_FP1_SOCKET_SUPPORT |
| 218 | * @li @e BLDOPT_REMOVE_FP1_SOCKET_SUPPORT @n |
| 219 | * This option removes the code which implements support for processors packaged for FP1 sockets. |
| 220 | * |
| 221 | * @anchor BLDOPT_REMOVE_FS1_SOCKET_SUPPORT |
| 222 | * @li @e BLDOPT_REMOVE_FS1_SOCKET_SUPPORT @n |
| 223 | * This option removes the code which implements support for processors packaged for FS1 sockets. |
| 224 | * |
| 225 | * @anchor BLDOPT_REMOVE_FT1_SOCKET_SUPPORT |
| 226 | * @li @e BLDOPT_REMOVE_FT1_SOCKET_SUPPORT @n |
| 227 | * This option removes the code which implements support for processors packaged for FT1 sockets. |
| 228 | * |
| 229 | * @anchor BLDOPT_REMOVE_G34_SOCKET_SUPPORT |
| 230 | * @li @e BLDOPT_REMOVE_G34_SOCKET_SUPPORT @n |
| 231 | * This option removes the code which implements support for processors packaged for G34 sockets. |
| 232 | * |
| 233 | * @anchor BLDOPT_REMOVE_S1G3_SOCKET_SUPPORT |
| 234 | * @li @e BLDOPT_REMOVE_S1G3_SOCKET_SUPPORT @n |
| 235 | * This option removes the code which implements support for processors packaged for S1G3 sockets. |
| 236 | * |
| 237 | * @anchor BLDOPT_REMOVE_S1G4_SOCKET_SUPPORT |
| 238 | * @li @e BLDOPT_REMOVE_S1G4_SOCKET_SUPPORT @n |
| 239 | * This option removes the code which implements support for processors packaged for S1G4 sockets. |
| 240 | */ |
| 241 | |
| 242 | /** |
| 243 | * @page examplecustomizations Customization Examples |
| 244 | * |
| 245 | * The Addendum \<plat\>Options.c file for each platform contains the minimum required |
| 246 | * customizations for that platform. That is, it contains settings which would be needed |
| 247 | * to boot a SimNow! bsd for that platform. |
| 248 | * However, each individual product based on that platform will have customizations necessary for |
| 249 | * that hardware. Since the actual customizations needed vary so much, they are not included in |
| 250 | * the \<plat\>Options.c. This section provides examples of useful customizations that you can use or |
| 251 | * modify to suit your needs. |
| 252 | * |
| 253 | * @par |
| 254 | * |
| 255 | * Source for the examples shown can be found at Addendum\\Examples. @n |
| 256 | * |
| 257 | * - @ref DeemphasisExamples "Deemphasis List Examples" |
| 258 | * - @ref FrequencyLimitExamples "Frequency Limit Examples" |
| 259 | * - @ref PerfPerWattHt "A performance-per-watt optimization Example" |
| 260 | * |
| 261 | * @anchor DeemphasisExamples |
| 262 | * @par Deemphasis List Examples |
| 263 | * |
| 264 | * These examples customize PLATFORM_CONFIGURATION.PlatformDeemphasisList. |
| 265 | * Source for the deemphasis list examples can be found in DeemphasisExamples.c. @n |
| 266 | * @dontinclude DeemphasisExamples.c |
| 267 | * <ul> |
| 268 | * <li> |
| 269 | * The following deemphasis list provides an example for a 2P MCM Max Performance configuration. |
| 270 | * High Speed HT frequencies are supported. There is only one non-coherent chain. Note the technique of |
| 271 | * putting specified link matches before all uses of match any. It often works well to specify the non-coherent links |
| 272 | * and use match any for the coherent links. |
| 273 | * @skip DinarDeemphasisList |
| 274 | * @until { |
| 275 | * The non-coherent chain can run up to 2600 MHz. The chain is located on Socket 0, package Link 2. |
| 276 | * @until { |
| 277 | * @line } |
| 278 | * @line { |
| 279 | * @line } |
| 280 | * The coherent links can run up to 3200 MHz. |
| 281 | * @until HT_FREQUENCY_MAX |
| 282 | * @line } |
| 283 | * end of list: |
| 284 | * @until } |
| 285 | * Make this list the build time customized deemphasis list. |
| 286 | * @line define |
| 287 | * |
| 288 | * </li><li> |
| 289 | * |
| 290 | * The following deemphasis list provides an example for a 4P MCM Max Performance configuration. |
| 291 | * This system has a backplane with connectors for CPU cards and an IO board. So trace lengths are long. |
| 292 | * There can be one to four IO Chains, depending on the IO board. |
| 293 | * @skipline DoubloonDeemphasisList |
| 294 | * @until DoubloonDeemphasisList |
| 295 | * |
| 296 | * </li><li> |
| 297 | * |
| 298 | * The following deemphasis list further illustrates complex coherent system deemphasis. This is the same |
| 299 | * Dinar system as in an earlier example, but this time all the coherent links are explicitly customized (as |
| 300 | * might be needed if each link has unique characterization). For this example, we skip the non-coherent chains. |
| 301 | * (A real system would have to include them, see example above.) |
| 302 | * @skip DinarPerLinkDeemphasisList |
| 303 | * @until { |
| 304 | * Provide deemphasis settings for the 16 bit, ganged, links, Socket 0 links 0, 1 and Socket 1 links 1 and 2. |
| 305 | * Provide entries to customize all HT3 frequencies at which the links may run. This example covers all HT3 speeds. |
| 306 | * @until { |
| 307 | * @until DcvLevelMinus6 |
| 308 | * @until DcvLevelMinus6 |
| 309 | * @until DcvLevelMinus6 |
| 310 | * @until DcvLevelMinus6 |
| 311 | * Link 3 on both sockets connects different internal die: sublink 0 connects the internal node zeroes, and |
| 312 | * sublink 1 connects the internal node ones. So the link is unganged and both sublinks must be specifically |
| 313 | * customized. |
| 314 | * @until { |
| 315 | * @until DcvLevelMinus6 |
| 316 | * @until DcvLevelMinus6 |
| 317 | * @until DcvLevelMinus6 |
| 318 | * @until DcvLevelMinus6 |
| 319 | * end of list: |
| 320 | * @until define |
| 321 | * |
| 322 | * </ul> |
| 323 | * |
| 324 | * @anchor FrequencyLimitExamples |
| 325 | * @par Frequency Limit Examples |
| 326 | * |
| 327 | * These examples customize AMD_HT_INTERFACE.CpuToCpuPcbLimitsList and AMD_HT_INTERFACE.IoPcbLimitsList. |
| 328 | * Source for the frequency limit examples can be found in FrequencyLimitExamples.c. @n |
| 329 | * @dontinclude FrequencyLimitExamples.c |
| 330 | * <ul> |
| 331 | * <li> |
| 332 | * The following list provides an example for limiting all coherent links to non-extended frequencies, |
| 333 | * that is, to 2600 MHz or less. |
| 334 | * @skipline NonExtendedCpuToCpuLimitList |
| 335 | * @until { |
| 336 | * Provide the limit customization. Match links from any socket, any package link, to any socket, any package link. Width is not limited. |
| 337 | * @until HT_FREQUENCY_LIMIT_2600M |
| 338 | * End of list: |
| 339 | * @until ; |
| 340 | * Customize the build to use this cpu to cpu frequency limit. |
| 341 | * @until NonExtendedCpuToCpuLimitList |
| 342 | * @n </li> |
| 343 | * <li> |
| 344 | * The following list provides an example for limiting all coherent links to HT 1 frequencies, |
| 345 | * that is, to 1000 MHz or less. This is sometimes useful for test and debug. |
| 346 | * @skipline Ht1CpuToCpuLimitList |
| 347 | * @until Ht1CpuToCpuLimitList |
| 348 | * @n </li> |
| 349 | * <li> |
| 350 | * The following list provides an example for limiting all non-coherent links to 2400 MHz or less. |
| 351 | * The chain is matched by host processor Socket and package Link. The depth can be used to select a particular device |
| 352 | * to device link on the chain. In this example, the chain consists of a single cave device and depth can be set to match any. |
| 353 | * @skipline No2600MhzIoLimitList |
| 354 | * @until No2600MhzIoLimitList |
| 355 | * @n </li> |
| 356 | * <li> |
| 357 | * The following list provides an example for limiting all non-coherent links to the minimum HT 3 frequency, |
| 358 | * that is, to 1200 MHz or less. This can be useful for test and debug. |
| 359 | * @skipline MinHt3IoLimitList |
| 360 | * @until MinHt3IoLimitList |
| 361 | * @n </li> |
| 362 | * |
| 363 | * </ul> |
| 364 | * |
| 365 | * @anchor PerfPerWattHt |
| 366 | * @par Performance-per-Watt Optimization Example |
| 367 | * |
| 368 | * This example customizes AMD_HT_INTERFACE.SkipRegangList. |
| 369 | * Source for the Performance-per-watt Optimization example can be found in PerfPerWatt.c. @n |
| 370 | * @dontinclude PerfPerWatt.c |
| 371 | * To implement a performance-per-watt optimization for MCM processors, use the skip regang structure shown. @n |
| 372 | * @skipline PerfPerWatt |
| 373 | * @until PerfPerWatt |
| 374 | * |
| 375 | */ |