Rob Barnes | 009a23d | 2020-04-13 01:27:12 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | /** |
| 4 | * This code was adapted from src/soc/amd/common/block/pi/amd_late_init.c |
| 5 | */ |
| 6 | |
| 7 | #include <fsp/util.h> |
| 8 | #include <memory_info.h> |
| 9 | #include <console/console.h> |
| 10 | #include <cbmem.h> |
| 11 | #include <string.h> |
| 12 | #include <ec/google/chromeec/ec.h> |
| 13 | #include <bootstate.h> |
| 14 | #include <lib.h> |
| 15 | #include <dimm_info_util.h> |
Nikolai Vyssotski | a289cdd | 2021-04-28 18:09:29 -0500 | [diff] [blame] | 16 | #include <dmi_info.h> |
Rob Barnes | e5aa5ae | 2020-09-14 07:51:51 -0600 | [diff] [blame] | 17 | #include <device/dram/ddr4.h> |
Nikolai Vyssotski | c839b37 | 2021-06-25 11:15:38 -0500 | [diff] [blame] | 18 | #include <device/dram/lpddr4.h> |
| 19 | |
| 20 | /** |
| 21 | * Convert DDR clock speed (based on memory type) in MHz to the standard reported speed in MT/s |
| 22 | */ |
| 23 | static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed) |
| 24 | { |
| 25 | switch (ddr_type) { |
| 26 | case MEMORY_TYPE_DDR4: |
| 27 | return ddr4_speed_mhz_to_reported_mts(speed); |
| 28 | case MEMORY_TYPE_LPDDR4: |
| 29 | return lpddr4_speed_mhz_to_reported_mts(speed); |
| 30 | default: |
| 31 | printk(BIOS_ERR, "ERROR: Unknown memory type %x", ddr_type); |
| 32 | return 0; |
| 33 | } |
| 34 | } |
Rob Barnes | 009a23d | 2020-04-13 01:27:12 -0600 | [diff] [blame] | 35 | |
| 36 | /** |
| 37 | * Populate dimm_info using AGESA TYPE17_DMI_INFO. |
| 38 | */ |
| 39 | static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17, |
| 40 | struct dimm_info *dimm) |
| 41 | { |
| 42 | hexstrtobin(dmi17->SerialNumber, dimm->serial, sizeof(dimm->serial)); |
| 43 | |
| 44 | dimm->dimm_size = smbios_memory_size_to_mib(dmi17->MemorySize, dmi17->ExtSize); |
| 45 | |
| 46 | dimm->ddr_type = dmi17->MemoryType; |
| 47 | |
Nikolai Vyssotski | c839b37 | 2021-06-25 11:15:38 -0500 | [diff] [blame] | 48 | dimm->configured_speed_mts = ddr_speed_mhz_to_reported_mts( |
| 49 | dmi17->MemoryType, dmi17->ConfigSpeed); |
Rob Barnes | b132bf5 | 2020-09-01 10:28:36 -0600 | [diff] [blame] | 50 | |
Nikolai Vyssotski | c839b37 | 2021-06-25 11:15:38 -0500 | [diff] [blame] | 51 | dimm->max_speed_mts = ddr_speed_mhz_to_reported_mts(dmi17->MemoryType, dmi17->Speed); |
Rob Barnes | 009a23d | 2020-04-13 01:27:12 -0600 | [diff] [blame] | 52 | |
| 53 | dimm->rank_per_dimm = dmi17->Attributes; |
| 54 | |
| 55 | dimm->mod_type = smbios_form_factor_to_spd_mod_type(dmi17->FormFactor); |
| 56 | |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 57 | dimm->bus_width = smbios_bus_width_to_spd_width(dmi17->MemoryType, dmi17->TotalWidth, |
| 58 | dmi17->DataWidth); |
Rob Barnes | 009a23d | 2020-04-13 01:27:12 -0600 | [diff] [blame] | 59 | |
| 60 | dimm->mod_id = dmi17->ManufacturerIdCode; |
| 61 | |
| 62 | dimm->bank_locator = 0; |
| 63 | |
| 64 | strncpy((char *)dimm->module_part_number, dmi17->PartNumber, |
| 65 | sizeof(dimm->module_part_number) - 1); |
| 66 | } |
| 67 | |
| 68 | static void print_dimm_info(const struct dimm_info *dimm) |
| 69 | { |
| 70 | printk(BIOS_DEBUG, |
| 71 | "CBMEM_ID_MEMINFO:\n" |
| 72 | " dimm_size: %u\n" |
| 73 | " ddr_type: 0x%hx\n" |
| 74 | " ddr_frequency: %hu\n" |
| 75 | " rank_per_dimm: %hhu\n" |
| 76 | " channel_num: %hhu\n" |
| 77 | " dimm_num: %hhu\n" |
| 78 | " bank_locator: %hhu\n" |
| 79 | " mod_id: %hx\n" |
| 80 | " mod_type: 0x%hhx\n" |
| 81 | " bus_width: %hhu\n" |
| 82 | " serial: %02hhx%02hhx%02hhx%02hhx\n" |
| 83 | " module_part_number(%zu): %s\n", |
| 84 | dimm->dimm_size, |
| 85 | dimm->ddr_type, |
| 86 | dimm->ddr_frequency, |
| 87 | dimm->rank_per_dimm, |
| 88 | dimm->channel_num, |
| 89 | dimm->dimm_num, |
| 90 | dimm->bank_locator, |
| 91 | dimm->mod_id, |
| 92 | dimm->mod_type, |
| 93 | dimm->bus_width, |
| 94 | dimm->serial[0], |
| 95 | dimm->serial[1], |
| 96 | dimm->serial[2], |
| 97 | dimm->serial[3], |
| 98 | strlen((const char *)dimm->module_part_number), |
| 99 | (char *)dimm->module_part_number); |
| 100 | } |
| 101 | |
| 102 | static void print_dmi_info(const TYPE17_DMI_INFO *dmi17) |
| 103 | { |
| 104 | printk(BIOS_DEBUG, |
| 105 | "AGESA TYPE 17 DMI INFO:\n" |
| 106 | " Handle: %hu\n" |
| 107 | " TotalWidth: %hu\n" |
| 108 | " DataWidth: %hu\n" |
| 109 | " MemorySize: %hu\n" |
| 110 | " DeviceSet: %hhu\n" |
| 111 | " Speed: %hu\n" |
| 112 | " ManufacturerIdCode: %llx\n" |
| 113 | " Attributes: %hhu\n" |
| 114 | " ExtSize: %u\n" |
| 115 | " ConfigSpeed: %hu\n" |
| 116 | " MemoryType: 0x%x\n" |
| 117 | " FormFactor: 0x%x\n" |
| 118 | " DeviceLocator: %8s\n" |
| 119 | " BankLocator: %10s\n" |
| 120 | " SerialNumber(%zu): %9s\n" |
| 121 | " PartNumber(%zu): %19s\n", |
| 122 | dmi17->Handle, |
| 123 | dmi17->TotalWidth, |
| 124 | dmi17->DataWidth, |
| 125 | dmi17->MemorySize, |
| 126 | dmi17->DeviceSet, |
| 127 | dmi17->Speed, |
| 128 | dmi17->ManufacturerIdCode, |
| 129 | dmi17->Attributes, |
| 130 | dmi17->ExtSize, |
| 131 | dmi17->ConfigSpeed, |
| 132 | dmi17->MemoryType, |
| 133 | dmi17->FormFactor, |
| 134 | dmi17->DeviceLocator, |
| 135 | dmi17->BankLocator, |
| 136 | strlen((const char *)dmi17->SerialNumber), |
| 137 | dmi17->SerialNumber, |
| 138 | strlen((const char *)dmi17->PartNumber), |
| 139 | dmi17->PartNumber); |
| 140 | } |
| 141 | |
| 142 | /** |
| 143 | * Marshalls dimm info from AMD_FSP_DMI_HOB into CBMEM_ID_MEMINFO |
| 144 | */ |
| 145 | static void prepare_dmi_17(void *unused) |
| 146 | { |
| 147 | const DMI_INFO *dmi_table; |
| 148 | const TYPE17_DMI_INFO *type17_dmi_info; |
| 149 | struct memory_info *mem_info; |
| 150 | struct dimm_info *dimm_info; |
| 151 | char cbi_part_number[DIMM_INFO_PART_NUMBER_SIZE]; |
| 152 | bool use_cbi_part_number = false; |
| 153 | size_t dimm_cnt = 0; |
| 154 | size_t amd_fsp_dmi_hob_size; |
| 155 | const EFI_GUID amd_fsp_dmi_hob_guid = AMD_FSP_DMI_HOB_GUID; |
| 156 | |
| 157 | printk(BIOS_DEBUG, "Saving dimm info for smbios type 17\n"); |
| 158 | |
| 159 | /* Allocate meminfo in cbmem. */ |
| 160 | mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info)); |
| 161 | if (!mem_info) { |
| 162 | printk(BIOS_ERR, |
| 163 | "Failed to add memory info to CBMEM, DMI tables will be incomplete\n"); |
| 164 | return; |
| 165 | } |
| 166 | memset(mem_info, 0, sizeof(struct memory_info)); |
| 167 | |
| 168 | /* Locate the memory info HOB. */ |
| 169 | dmi_table = fsp_find_extension_hob_by_guid( |
| 170 | (const uint8_t *)&amd_fsp_dmi_hob_guid, &amd_fsp_dmi_hob_size); |
| 171 | |
| 172 | if (dmi_table == NULL || amd_fsp_dmi_hob_size == 0) { |
| 173 | printk(BIOS_ERR, |
| 174 | "AMD_FSP_DMI_HOB not found, DMI table 17 will be incomplete\n"); |
| 175 | return; |
| 176 | } |
| 177 | printk(BIOS_DEBUG, "AMD_FSP_DMI_HOB found\n"); |
| 178 | |
Nikolai Vyssotski | 60d67ce | 2021-04-28 19:26:37 -0500 | [diff] [blame] | 179 | if (CONFIG(EC_GOOGLE_CHROMEEC)) { |
Rob Barnes | 009a23d | 2020-04-13 01:27:12 -0600 | [diff] [blame] | 180 | /* Prefer DRAM part number from CBI. */ |
| 181 | if (google_chromeec_cbi_get_dram_part_num( |
| 182 | cbi_part_number, sizeof(cbi_part_number)) == 0) { |
| 183 | use_cbi_part_number = true; |
| 184 | } else { |
| 185 | printk(BIOS_ERR, "Could not obtain DRAM part number from CBI\n"); |
| 186 | } |
| 187 | } |
| 188 | |
| 189 | for (unsigned int channel = 0; channel < MAX_CHANNELS_PER_SOCKET; channel++) { |
| 190 | for (unsigned int dimm = 0; dimm < MAX_DIMMS_PER_CHANNEL; dimm++) { |
| 191 | type17_dmi_info = &dmi_table->T17[0][channel][dimm]; |
| 192 | /* DIMMs that are present will have a non-zero |
| 193 | handle. */ |
| 194 | if (type17_dmi_info->Handle == 0) |
| 195 | continue; |
| 196 | print_dmi_info(type17_dmi_info); |
| 197 | dimm_info = &mem_info->dimm[dimm_cnt]; |
| 198 | dimm_info->channel_num = channel; |
| 199 | dimm_info->dimm_num = channel; |
| 200 | transfer_memory_info(type17_dmi_info, dimm_info); |
| 201 | if (use_cbi_part_number) { |
| 202 | /* mem_info is memset to 0 above, so it's |
| 203 | safe to assume module_part_number will be |
| 204 | null terminated */ |
| 205 | strncpy((char *)dimm_info->module_part_number, cbi_part_number, |
| 206 | sizeof(dimm_info->module_part_number) - 1); |
| 207 | } |
| 208 | print_dimm_info(dimm_info); |
| 209 | dimm_cnt++; |
| 210 | } |
| 211 | } |
| 212 | mem_info->dimm_cnt = dimm_cnt; |
| 213 | } |
| 214 | |
| 215 | /* AMD_FSP_DMI_HOB is initialized very late, so check it just in time for writing tables. */ |
| 216 | BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, prepare_dmi_17, NULL); |