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Kerry Shehb7993512011-11-15 21:27:07 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Kerry Shehb7993512011-11-15 21:27:07 +080018 */
19
20#include <console/console.h>
21#include <device/pci.h>
22#include <device/pci_ids.h>
23#include <string.h>
24#include <stdint.h>
25#include <stdlib.h>
26#include <cpu/amd/amdfam14.h>
27#include "agesawrapper.h"
Kerry Shehb7993512011-11-15 21:27:07 +080028
29
30/* Global variables for MB layouts and these will be shared by irqtable mptable
31* and acpi_tables busnum is default.
32*/
Kyösti Mälkki9c7d73c2013-09-09 09:23:19 +030033u8 bus_sb800[6];
Kerry Shehb7993512011-11-15 21:27:07 +080034u32 apicid_sb800;
35
36/*
37* Here you only need to set value in pci1234 for HT-IO that could be installed or not
38* You may need to preset pci1234 for HTIO board,
39* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
40*/
41u32 pci1234x[] = {
42 0x0000ff0,
43};
44
Kerry Shehb7993512011-11-15 21:27:07 +080045u32 sbdn_sb800;
46
Kerry Shehb7993512011-11-15 21:27:07 +080047void get_bus_conf(void)
48{
49 u32 apicid_base;
Kerry Shehb7993512011-11-15 21:27:07 +080050
51 device_t dev;
Kyösti Mälkki53584fa2014-07-15 14:38:51 +030052 int i;
Kerry Shehb7993512011-11-15 21:27:07 +080053
Kerry Shehb7993512011-11-15 21:27:07 +080054
Kerry Shehb7993512011-11-15 21:27:07 +080055 sbdn_sb800 = 0;
56
Kyösti Mälkki9c7d73c2013-09-09 09:23:19 +030057 memset(bus_sb800, 0, sizeof(bus_sb800));
Kerry Shehb7993512011-11-15 21:27:07 +080058
Kerry Shehb7993512011-11-15 21:27:07 +080059
60// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
61 bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
62
63 /* sb800 */
64 dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
65
66
67
68 if (dev) {
69 bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
Kerry Shehb7993512011-11-15 21:27:07 +080070 }
71
72 for (i = 0; i < 4; i++) {
73 dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
74 if (dev) {
75 bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
Kerry Shehb7993512011-11-15 21:27:07 +080076 }
77 }
Kerry Shehb7993512011-11-15 21:27:07 +080078
79
80 /* I/O APICs: APIC ID Version State Address */
Kerry Shehb7993512011-11-15 21:27:07 +080081 apicid_base = CONFIG_MAX_CPUS;
82 apicid_sb800 = apicid_base;
83
Kerry Shehb7993512011-11-15 21:27:07 +080084}