| Arthur Heymans | 98a46fb | 2023-07-13 18:31:13 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <cbmem.h> |
| 4 | #include <console/console.h> |
| 5 | #include "opensil_console.h" |
| 6 | #include <xSIM-api.h> |
| 7 | #include <xPRF-api.h> |
| 8 | |
| 9 | uintptr_t cbmem_top_chipset(void) |
| 10 | { |
| 11 | SilDebugSetup(HostDebugService); |
| 12 | uintptr_t top_mem = xPrfGetLowUsableDramAddress(0); |
| 13 | printk(BIOS_DEBUG, "xPrfGetLowUsableDramAddress: 0x%lx\n", top_mem); |
| 14 | |
| 15 | /* The TSEG MSR has an 8M granularity. TSEG also needs to be aligned to its size so |
| 16 | account for potentially ill aligned TOP_MEM. */ |
| 17 | if (CONFIG_SMM_TSEG_SIZE) { |
| 18 | top_mem -= CONFIG_SMM_TSEG_SIZE; |
| 19 | top_mem = ALIGN_DOWN(top_mem, CONFIG_SMM_TSEG_SIZE); |
| 20 | } |
| 21 | |
| 22 | return top_mem; |
| 23 | } |