Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Intel Corp. |
| 5 | * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) |
| 6 | * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
Martin Roth | ebabfad | 2016-04-10 11:09:16 -0600 | [diff] [blame] | 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 17 | */ |
| 18 | |
| 19 | #include <console/console.h> |
| 20 | #include <soc/iomap.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <device/pci_ids.h> |
| 23 | #include <soc/northbridge.h> |
| 24 | #include <soc/pci_ids.h> |
| 25 | |
| 26 | static uint32_t get_bar(device_t dev, unsigned int index) |
| 27 | { |
| 28 | uint32_t bar; |
| 29 | |
| 30 | bar = pci_read_config32(dev, index); |
| 31 | |
| 32 | /* If not enabled return 0 else strip enabled bit */ |
| 33 | return (bar & 1) ? (bar & ~1) : 0; |
| 34 | } |
| 35 | |
| 36 | static int mc_add_fixed_mmio_resources(device_t dev, int index) |
| 37 | { |
Andrey Petrov | 15c736b | 2016-03-30 18:15:30 -0700 | [diff] [blame] | 38 | unsigned long addr; |
| 39 | |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 40 | /* PCI extended config region */ |
Andrey Petrov | 15c736b | 2016-03-30 18:15:30 -0700 | [diff] [blame] | 41 | addr = ALIGN_DOWN(get_bar(dev, PCIEXBAR), 256*MiB) / KiB; |
| 42 | mmio_resource(dev, index++, addr, PCIEX_SIZE / KiB); |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 43 | |
| 44 | /* Memory Controller Hub */ |
Andrey Petrov | 15c736b | 2016-03-30 18:15:30 -0700 | [diff] [blame] | 45 | addr = ALIGN_DOWN(get_bar(dev, MCHBAR), 32*KiB) / KiB; |
| 46 | mmio_resource(dev, index++, addr, MCH_BASE_SIZE / KiB); |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 47 | |
| 48 | return index; |
| 49 | } |
| 50 | |
Andrey Petrov | 28c78ab | 2016-04-04 16:10:40 -0700 | [diff] [blame] | 51 | static bool is_imr_enabled(uint32_t imr_base_reg) |
| 52 | { |
| 53 | return !!(imr_base_reg & (1 << 31)); |
| 54 | } |
| 55 | |
| 56 | static void imr_resource(device_t dev, int idx, uint32_t base, uint32_t mask) |
| 57 | { |
| 58 | uint32_t base_k, size_k; |
| 59 | /* Bits 28:0 encode the base address bits 38:10, hence the KiB unit. */ |
| 60 | base_k = (base & 0x0fffffff); |
| 61 | /* Bits 28:0 encode the AND mask used for comparison, in KiB. */ |
| 62 | size_k = ((~mask & 0x0fffffff) + 1); |
| 63 | /* |
| 64 | * IMRs sit in lower DRAM. Mark them cacheable, otherwise we run |
| 65 | * out of MTRRs. Memory reserved by IMRs is not usable for host |
| 66 | * so mark it reserved. |
| 67 | */ |
| 68 | reserved_ram_resource(dev, idx, base_k, size_k); |
| 69 | } |
| 70 | |
| 71 | static int mc_add_imr_resources(device_t dev, int index) |
| 72 | { |
| 73 | uint8_t *mchbar; |
| 74 | size_t i, imr_offset; |
| 75 | uint32_t base, mask; |
| 76 | |
| 77 | mchbar = (void *)(ALIGN_DOWN(get_bar(dev, MCHBAR), 32*KiB)); |
| 78 | |
| 79 | for (i = 0; i < MCH_NUM_IMRS; i ++) { |
| 80 | imr_offset = i * MCH_IMR_PITCH; |
| 81 | base = read32(mchbar + imr_offset + MCHBAR_IMR0BASE); |
| 82 | mask = read32(mchbar + imr_offset + MCHBAR_IMR0MASK); |
| 83 | |
| 84 | if (is_imr_enabled(base)) { |
| 85 | imr_resource(dev, index++, base, mask); |
| 86 | } |
| 87 | } |
| 88 | |
| 89 | return index; |
| 90 | } |
| 91 | |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 92 | |
| 93 | static int mc_add_dram_resources(device_t dev, int index) |
| 94 | { |
| 95 | unsigned long base_k, size_k; |
| 96 | uint32_t bgsm, bdsm, tolud, tseg; |
| 97 | uint64_t touud; |
| 98 | |
| 99 | bgsm = ALIGN_DOWN(pci_read_config32(dev, BGSM), MiB); |
| 100 | bdsm = ALIGN_DOWN(pci_read_config32(dev, BDSM), MiB); |
| 101 | tolud = ALIGN_DOWN(pci_read_config32(dev, TOLUD), MiB); |
| 102 | tseg = ALIGN_DOWN(pci_read_config32(dev, TSEG), MiB); |
| 103 | |
| 104 | /* TOUUD is naturally a 64 bit integer */ |
| 105 | touud = pci_read_config32(dev, TOUUD + sizeof(uint32_t)); |
| 106 | touud <<= 32; |
| 107 | touud |= ALIGN_DOWN(pci_read_config32(dev, TOUUD), MiB); |
| 108 | |
| 109 | /* 0 - > 0xa0000: 640kb of DOS memory. Not enough for anybody nowadays */ |
| 110 | ram_resource(dev, index++, 0, 640); |
| 111 | |
Andrey Petrov | 1ba0685 | 2016-04-21 14:59:12 -0700 | [diff] [blame] | 112 | /* 0xa0000 - 0xbffff: legacy VGA */ |
| 113 | mmio_resource(dev, index++, 640, 128); |
| 114 | |
| 115 | /* 0xc0000 -> 0xfffff: leave without e820 entry, as it has special uses */ |
| 116 | /* 0x100000 -> top_of_ram */ |
| 117 | base_k = 1024; |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 118 | size_k = (tseg / KiB) - base_k; |
| 119 | ram_resource(dev, index++, base_k, size_k); |
| 120 | |
| 121 | /* TSEG -> BGSM */ |
| 122 | reserved_ram_resource(dev, index++, tseg / KiB, (bgsm - tseg) / KiB); |
| 123 | |
| 124 | /* BGSM -> BDSM */ |
| 125 | mmio_resource(dev, index++, bgsm / KiB, (bdsm - bgsm) / KiB); |
| 126 | |
| 127 | /* BDSM -> TOLUD */ |
Aaron Durbin | 7ec9b6c | 2016-05-05 15:00:01 -0500 | [diff] [blame] | 128 | mmio_resource(dev, index++, bdsm / KiB, (tolud - bdsm) / KiB); |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 129 | |
| 130 | /* 4G -> TOUUD */ |
| 131 | base_k = 4ULL*GiB / KiB; |
| 132 | size_k = (touud / KiB) - base_k; |
| 133 | ram_resource(dev, index++, base_k, size_k); |
| 134 | |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 135 | |
| 136 | return index; |
| 137 | } |
| 138 | |
| 139 | static void northbridge_read_resources(device_t dev) |
| 140 | { |
| 141 | |
| 142 | int index = 0; |
| 143 | /* Read standard PCI resources. */ |
| 144 | pci_dev_read_resources(dev); |
| 145 | |
| 146 | /* Add all fixed MMIO resources. */ |
| 147 | index = mc_add_fixed_mmio_resources(dev, index); |
| 148 | |
| 149 | /* Calculate and add DRAM resources. */ |
Andrey Petrov | 28c78ab | 2016-04-04 16:10:40 -0700 | [diff] [blame] | 150 | index = mc_add_dram_resources(dev, index); |
| 151 | |
| 152 | /* Add the isolated memory ranges (IMRs). */ |
| 153 | mc_add_imr_resources(dev, index); |
| 154 | |
Andrey Petrov | a2176d8 | 2016-01-15 18:05:12 -0800 | [diff] [blame] | 155 | } |
| 156 | |
| 157 | static struct device_operations northbridge_ops = { |
| 158 | .read_resources = northbridge_read_resources, |
| 159 | .set_resources = pci_dev_set_resources, |
| 160 | .enable_resources = pci_dev_enable_resources, |
| 161 | .init = DEVICE_NOOP, |
| 162 | .enable = DEVICE_NOOP |
| 163 | }; |
| 164 | |
| 165 | static const struct pci_driver northbridge_driver __pci_driver = { |
| 166 | .ops = &northbridge_ops, |
| 167 | .vendor = PCI_VENDOR_ID_INTEL, |
| 168 | .device = PCI_DEVICE_ID_APOLLOLAKE_NB |
| 169 | }; |