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review.coreboot.org / coreboot / 9631016660423d0585a1 / . / util / msrtool / cs5536.c
blob: d9c66d2c8825822baf11a6eb240786852d4d8a6f [file] [log] [blame]
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]1/*
2 * This file is part of msrtool.
3 *
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]4 * Copyright (c) 2009 Peter Stuge <peter@stuge.se>
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]14 */
15
16#include "msrtool.h"
17
Anton Kochkov59b36f12012-07-21 07:29:48 +0400[diff] [blame]18int cs5536_probe(const struct targetdef *target, const struct cpuid_t *id) {
Peter Stugefbda0d32009-01-26 04:12:58 +0000[diff] [blame]19 return (NULL != pci_dev_find(0x1022, 0x2090));
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]20}
21
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]22/**
23 * Documentation referenced:
24 *
25 * 33238G: AMD Geode(tm) CS5536 Companion Device Data Book
26 * http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33238G_cs5536_db.pdf
27 *
28 */
29
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]30const struct msrdef cs5536_msrs[] = {
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]31 /* 0x51400008-0x5140000f per 33238G pages 356-361 */
32 /* 0x51400015 per 33238G pages 365-366 */
33 /* 0x51400020-0x51400027 per 33238G pages 379-385 */
34 { 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR - IRQ Mapper", {
35 { 63, 15, RESERVED },
36 { 48, 1, RESERVED },
37 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
38 { BITVAL_EOT }
39 }},
40 { 43, 11, RESERVED },
41 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
42 { MSR1(0), "Disable LBAR" },
43 { MSR1(1), "Enable LBAR" },
44 { BITVAL_EOT }
45 }},
46 { 31, 15, RESERVED },
47 { 16, 1, RESERVED },
48 { 15, 11, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
49 { BITVAL_EOT }
50 }},
51 { 4, 5, RESERVED },
52 { BITS_EOT }
53 }},
54 { 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR - Keyboard Emulation Logic from USB", {
55 { 63, 20, "MEM_MASK", "Memory Address Mask Value", PRESENT_HEX, {
56 { BITVAL_EOT }
57 }},
58 { 43, 11, RESERVED },
59 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
60 { MSR1(0), "Disable LBAR" },
61 { MSR1(1), "Enable LBAR" },
62 { BITVAL_EOT }
63 }},
64 { 31, 20, "BASE_ADDR", "Base Address in Memory Space", PRESENT_HEX, {
65 { BITVAL_EOT }
66 }},
67 { 11, 12, RESERVED },
68 { BITS_EOT }
69 }},
70 /* 0x5140000a is not mentioned in the databook */
71 { 0x5140000b, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_SMB", "Local BAR - System Management Bus", {
72 { 63, 15, RESERVED },
73 { 48, 1, RESERVED },
74 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
75 { BITVAL_EOT }
76 }},
77 { 43, 11, RESERVED },
78 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
79 { MSR1(0), "Disable LBAR" },
80 { MSR1(1), "Enable LBAR" },
81 { BITVAL_EOT }
82 }},
83 { 31, 15, RESERVED },
84 { 16, 1, RESERVED },
85 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
86 { BITVAL_EOT }
87 }},
88 { 7, 8, RESERVED },
89 { BITS_EOT }
90 }},
91 { 0x5140000c, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_GPIO", "Local BAR - GPIO and Input Conditioning Functions", {
92 { 63, 15, RESERVED },
93 { 48, 1, RESERVED },
94 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
95 { BITVAL_EOT }
96 }},
97 { 43, 11, RESERVED },
98 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
99 { MSR1(0), "Disable LBAR" },
100 { MSR1(1), "Enable LBAR" },
101 { BITVAL_EOT }
102 }},
103 { 31, 15, RESERVED },
104 { 16, 1, RESERVED },
105 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
106 { BITVAL_EOT }
107 }},
108 { 7, 8, RESERVED },
109 { BITS_EOT }
110 }},
111 { 0x5140000d, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_MFGPT", "Local BAR - MFGPTs", {
112 { 63, 15, RESERVED },
113 { 48, 1, RESERVED },
114 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
115 { BITVAL_EOT }
116 }},
117 { 43, 11, RESERVED },
118 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
119 { MSR1(0), "Disable LBAR" },
120 { MSR1(1), "Enable LBAR" },
121 { BITVAL_EOT }
122 }},
123 { 31, 15, RESERVED },
124 { 16, 1, RESERVED },
125 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
126 { BITVAL_EOT }
127 }},
128 { 7, 8, RESERVED },
129 { BITS_EOT }
130 }},
131 { 0x5140000e, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_ACPI", "Local BAR - ACPI", {
132 { 63, 15, RESERVED },
133 { 48, 1, RESERVED },
134 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
135 { BITVAL_EOT }
136 }},
137 { 43, 11, RESERVED },
138 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
139 { MSR1(0), "Disable LBAR" },
140 { MSR1(1), "Enable LBAR" },
141 { BITVAL_EOT }
142 }},
143 { 31, 15, RESERVED },
144 { 16, 1, RESERVED },
145 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
146 { BITVAL_EOT }
147 }},
148 { 7, 8, RESERVED },
149 { BITS_EOT }
150 }},
151 { 0x5140000f, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_PMS", "Local BAR - Power Management Support", {
152 { 63, 15, RESERVED },
153 { 48, 1, RESERVED },
154 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
155 { BITVAL_EOT }
156 }},
157 { 43, 11, RESERVED },
158 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
159 { MSR1(0), "Disable LBAR" },
160 { MSR1(1), "Enable LBAR" },
161 { BITVAL_EOT }
162 }},
163 { 31, 15, RESERVED },
164 { 16, 1, RESERVED },
165 { 15, 9, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
166 { BITVAL_EOT }
167 }},
168 { 6, 7, RESERVED },
169 { BITS_EOT }
170 }},
171 { 0x51400015, MSRTYPE_RDWR, MSR2(0, 0x70), "DIVIL_BALL_OPTS", "Ball Options Control", {
172 { 63, 32, RESERVED },
173 { 31, 20, RESERVED },
174 { 11, 2, "SEC_BOOT_LOC", "Secondary Boot Location", PRESENT_BIN, {
175 { MSR1(0), "LPC ROM" },
176 { MSR1(2), "NOR Flash on IDE" },
177 { MSR1(3), "Firmware Hub" },
178 { BITVAL_EOT }
179 }},
180 { 9, 2, "BOOT_OP_LATCHED", "Latched Value of Boot Option", PRESENT_BIN, {
181 { MSR1(0), "LPC ROM" },
182 { MSR1(2), "NOR Flash on IDE" },
183 { MSR1(3), "Firmware Hub" },
184 { BITVAL_EOT }
185 }},
186 { 7, 1, RESERVED },
187 { 6, 1, "PIN_OPT_LALL", "All LPC Pin Option Selection", PRESENT_BIN, {
188 { MSR1(0), "All LPC pins become GPIOs including LPC_DRQ# and LPC_SERIRQ" },
189 { MSR1(1), "All LPC pins are controlled by the LPC controller except LPC_DRQ# and LPC_SERIRQ (bits [5:4])" },
190 { BITVAL_EOT }
191 }},
192 { 5, 1, "PIN_OPT_LIRQ", "LPC_SERIRQ or GPIO21 Pin Option Selection", PRESENT_BIN, {
193 { MSR1(0), "Ball G2 is GPIO21" },
194 { MSR1(1), "Ball G2 functions as LPC_SERIRQ" },
195 { BITVAL_EOT }
196 }},
197 { 4, 1, "PIN_OPT_LDRQ", "LPC_DRQ# or GPIO20 Pin Option Selection", PRESENT_BIN, {
198 { MSR1(0), "Ball G1 is GPIO20" },
199 { MSR1(1), "Ball G1 functions as LPC_DRQ#" },
200 { BITVAL_EOT }
201 }},
202 { 3, 2, "PRI_BOOT_LOC", "Primary Boot Location", PRESENT_BIN, {
203 { MSR1(0), "LPC ROM" },
204 { MSR1(2), "NOR Flash on IDE" },
205 { MSR1(3), "Firmware Hub" },
206 { BITVAL_EOT }
207 }},
208 { 1, 1, RESERVED },
209 { 0, 1, "PIN_OPT_IDE", "IDE or Flash Controller Pin Function Selection", PRESENT_BIN, {
210 { MSR1(0), "All IDE pins associated with Flash Controller" },
211 { MSR1(1), "All IDE pins associated with IDE Controller" },
212 { BITVAL_EOT }
213 }},
214 }},
215 { 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper Unrestricted Y Select Low", {
216 { 63, 32, RESERVED },
217 { 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {
218 { MSR1(0), "Disable" },
219 { MSR1(1), "Interrupt Group 1" },
220 { MSR1(2), "Interrupt Group 2" },
221 { MSR1(3), "Interrupt Group 3" },
222 { MSR1(4), "Interrupt Group 4" },
223 { MSR1(5), "Interrupt Group 5" },
224 { MSR1(6), "Interrupt Group 6" },
225 { MSR1(7), "Interrupt Group 7" },
226 { MSR1(8), "Interrupt Group 8" },
227 { MSR1(9), "Interrupt Group 9" },
228 { MSR1(10), "Interrupt Group 10" },
229 { MSR1(11), "Interrupt Group 11" },
230 { MSR1(12), "Interrupt Group 12" },
231 { MSR1(13), "Interrupt Group 13" },
232 { MSR1(14), "Interrupt Group 14" },
233 { MSR1(15), "Interrupt Group 15" },
234 { BITVAL_EOT }
235 }},
236 { 27, 4, "MAP_Y6", "Map Unrestricted Y Input 6", PRESENT_BIN, {
237 { MSR1(0), "Disable" },
238 { MSR1(1), "Interrupt Group 1" },
239 { MSR1(2), "Interrupt Group 2" },
240 { MSR1(3), "Interrupt Group 3" },
241 { MSR1(4), "Interrupt Group 4" },
242 { MSR1(5), "Interrupt Group 5" },
243 { MSR1(6), "Interrupt Group 6" },
244 { MSR1(7), "Interrupt Group 7" },
245 { MSR1(8), "Interrupt Group 8" },
246 { MSR1(9), "Interrupt Group 9" },
247 { MSR1(10), "Interrupt Group 10" },
248 { MSR1(11), "Interrupt Group 11" },
249 { MSR1(12), "Interrupt Group 12" },
250 { MSR1(13), "Interrupt Group 13" },
251 { MSR1(14), "Interrupt Group 14" },
252 { MSR1(15), "Interrupt Group 15" },
253 { BITVAL_EOT }
254 }},
255 { 23, 4, "MAP_Y5", "Map Unrestricted Y Input 5", PRESENT_BIN, {
256 { MSR1(0), "Disable" },
257 { MSR1(1), "Interrupt Group 1" },
258 { MSR1(2), "Interrupt Group 2" },
259 { MSR1(3), "Interrupt Group 3" },
260 { MSR1(4), "Interrupt Group 4" },
261 { MSR1(5), "Interrupt Group 5" },
262 { MSR1(6), "Interrupt Group 6" },
263 { MSR1(7), "Interrupt Group 7" },
264 { MSR1(8), "Interrupt Group 8" },
265 { MSR1(9), "Interrupt Group 9" },
266 { MSR1(10), "Interrupt Group 10" },
267 { MSR1(11), "Interrupt Group 11" },
268 { MSR1(12), "Interrupt Group 12" },
269 { MSR1(13), "Interrupt Group 13" },
270 { MSR1(14), "Interrupt Group 14" },
271 { MSR1(15), "Interrupt Group 15" },
272 { BITVAL_EOT }
273 }},
274 { 19, 4, "MAP_Y4", "Map Unrestricted Y Input 4", PRESENT_BIN, {
275 { MSR1(0), "Disable" },
276 { MSR1(1), "Interrupt Group 1" },
277 { MSR1(2), "Interrupt Group 2" },
278 { MSR1(3), "Interrupt Group 3" },
279 { MSR1(4), "Interrupt Group 4" },
280 { MSR1(5), "Interrupt Group 5" },
281 { MSR1(6), "Interrupt Group 6" },
282 { MSR1(7), "Interrupt Group 7" },
283 { MSR1(8), "Interrupt Group 8" },
284 { MSR1(9), "Interrupt Group 9" },
285 { MSR1(10), "Interrupt Group 10" },
286 { MSR1(11), "Interrupt Group 11" },
287 { MSR1(12), "Interrupt Group 12" },
288 { MSR1(13), "Interrupt Group 13" },
289 { MSR1(14), "Interrupt Group 14" },
290 { MSR1(15), "Interrupt Group 15" },
291 { BITVAL_EOT }
292 }},
293 { 15, 4, "MAP_Y3", "Map Unrestricted Y Input 3", PRESENT_BIN, {
294 { MSR1(0), "Disable" },
295 { MSR1(1), "Interrupt Group 1" },
296 { MSR1(2), "Interrupt Group 2" },
297 { MSR1(3), "Interrupt Group 3" },
298 { MSR1(4), "Interrupt Group 4" },
299 { MSR1(5), "Interrupt Group 5" },
300 { MSR1(6), "Interrupt Group 6" },
301 { MSR1(7), "Interrupt Group 7" },
302 { MSR1(8), "Interrupt Group 8" },
303 { MSR1(9), "Interrupt Group 9" },
304 { MSR1(10), "Interrupt Group 10" },
305 { MSR1(11), "Interrupt Group 11" },
306 { MSR1(12), "Interrupt Group 12" },
307 { MSR1(13), "Interrupt Group 13" },
308 { MSR1(14), "Interrupt Group 14" },
309 { MSR1(15), "Interrupt Group 15" },
310 { BITVAL_EOT }
311 }},
312 { 11, 4, "MAP_Y2", "Map Unrestricted Y Input 2", PRESENT_BIN, {
313 { MSR1(0), "Disable" },
314 { MSR1(1), "Interrupt Group 1" },
315 { MSR1(2), "Interrupt Group 2" },
316 { MSR1(3), "Interrupt Group 3" },
317 { MSR1(4), "Interrupt Group 4" },
318 { MSR1(5), "Interrupt Group 5" },
319 { MSR1(6), "Interrupt Group 6" },
320 { MSR1(7), "Interrupt Group 7" },
321 { MSR1(8), "Interrupt Group 8" },
322 { MSR1(9), "Interrupt Group 9" },
323 { MSR1(10), "Interrupt Group 10" },
324 { MSR1(11), "Interrupt Group 11" },
325 { MSR1(12), "Interrupt Group 12" },
326 { MSR1(13), "Interrupt Group 13" },
327 { MSR1(14), "Interrupt Group 14" },
328 { MSR1(15), "Interrupt Group 15" },
329 { BITVAL_EOT }
330 }},
331 { 7, 4, "MAP_Y1", "Map Unrestricted Y Input 1", PRESENT_BIN, {
332 { MSR1(0), "Disable" },
333 { MSR1(1), "Interrupt Group 1" },
334 { MSR1(2), "Interrupt Group 2" },
335 { MSR1(3), "Interrupt Group 3" },
336 { MSR1(4), "Interrupt Group 4" },
337 { MSR1(5), "Interrupt Group 5" },
338 { MSR1(6), "Interrupt Group 6" },
339 { MSR1(7), "Interrupt Group 7" },
340 { MSR1(8), "Interrupt Group 8" },
341 { MSR1(9), "Interrupt Group 9" },
342 { MSR1(10), "Interrupt Group 10" },
343 { MSR1(11), "Interrupt Group 11" },
344 { MSR1(12), "Interrupt Group 12" },
345 { MSR1(13), "Interrupt Group 13" },
346 { MSR1(14), "Interrupt Group 14" },
347 { MSR1(15), "Interrupt Group 15" },
348 { BITVAL_EOT }
349 }},
350 { 3, 4, "MAP_Y0", "Map Unrestricted Y Input 0", PRESENT_BIN, {
351 { MSR1(0), "Disable" },
352 { MSR1(1), "Interrupt Group 1" },
353 { MSR1(2), "Interrupt Group 2" },
354 { MSR1(3), "Interrupt Group 3" },
355 { MSR1(4), "Interrupt Group 4" },
356 { MSR1(5), "Interrupt Group 5" },
357 { MSR1(6), "Interrupt Group 6" },
358 { MSR1(7), "Interrupt Group 7" },
359 { MSR1(8), "Interrupt Group 8" },
360 { MSR1(9), "Interrupt Group 9" },
361 { MSR1(10), "Interrupt Group 10" },
362 { MSR1(11), "Interrupt Group 11" },
363 { MSR1(12), "Interrupt Group 12" },
364 { MSR1(13), "Interrupt Group 13" },
365 { MSR1(14), "Interrupt Group 14" },
366 { MSR1(15), "Interrupt Group 15" },
367 { BITVAL_EOT }
368 }},
369 { BITS_EOT }
370 }},
371 { 0x51400021, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_HIGH", "IRQ Mapper Unrestricted Y Select High", {
372 { 63, 32, RESERVED },
373 { 31, 4, "MAP_Y15", "Map Unrestricted Y Input 15", PRESENT_BIN, {
374 { MSR1(0), "Disable" },
375 { MSR1(1), "Interrupt Group 1" },
376 { MSR1(2), "Interrupt Group 2" },
377 { MSR1(3), "Interrupt Group 3" },
378 { MSR1(4), "Interrupt Group 4" },
379 { MSR1(5), "Interrupt Group 5" },
380 { MSR1(6), "Interrupt Group 6" },
381 { MSR1(7), "Interrupt Group 7" },
382 { MSR1(8), "Interrupt Group 8" },
383 { MSR1(9), "Interrupt Group 9" },
384 { MSR1(10), "Interrupt Group 10" },
385 { MSR1(11), "Interrupt Group 11" },
386 { MSR1(12), "Interrupt Group 12" },
387 { MSR1(13), "Interrupt Group 13" },
388 { MSR1(14), "Interrupt Group 14" },
389 { MSR1(15), "Interrupt Group 15" },
390 { BITVAL_EOT }
391 }},
392 { 27, 4, "MAP_Y14", "Map Unrestricted Y Input 14", PRESENT_BIN, {
393 { MSR1(0), "Disable" },
394 { MSR1(1), "Interrupt Group 1" },
395 { MSR1(2), "Interrupt Group 2" },
396 { MSR1(3), "Interrupt Group 3" },
397 { MSR1(4), "Interrupt Group 4" },
398 { MSR1(5), "Interrupt Group 5" },
399 { MSR1(6), "Interrupt Group 6" },
400 { MSR1(7), "Interrupt Group 7" },
401 { MSR1(8), "Interrupt Group 8" },
402 { MSR1(9), "Interrupt Group 9" },
403 { MSR1(10), "Interrupt Group 10" },
404 { MSR1(11), "Interrupt Group 11" },
405 { MSR1(12), "Interrupt Group 12" },
406 { MSR1(13), "Interrupt Group 13" },
407 { MSR1(14), "Interrupt Group 14" },
408 { MSR1(15), "Interrupt Group 15" },
409 { BITVAL_EOT }
410 }},
411 { 23, 4, "MAP_Y13", "Map Unrestricted Y Input 13", PRESENT_BIN, {
412 { MSR1(0), "Disable" },
413 { MSR1(1), "Interrupt Group 1" },
414 { MSR1(2), "Interrupt Group 2" },
415 { MSR1(3), "Interrupt Group 3" },
416 { MSR1(4), "Interrupt Group 4" },
417 { MSR1(5), "Interrupt Group 5" },
418 { MSR1(6), "Interrupt Group 6" },
419 { MSR1(7), "Interrupt Group 7" },
420 { MSR1(8), "Interrupt Group 8" },
421 { MSR1(9), "Interrupt Group 9" },
422 { MSR1(10), "Interrupt Group 10" },
423 { MSR1(11), "Interrupt Group 11" },
424 { MSR1(12), "Interrupt Group 12" },
425 { MSR1(13), "Interrupt Group 13" },
426 { MSR1(14), "Interrupt Group 14" },
427 { MSR1(15), "Interrupt Group 15" },
428 { BITVAL_EOT }
429 }},
430 { 19, 4, "MAP_Y12", "Map Unrestricted Y Input 12", PRESENT_BIN, {
431 { MSR1(0), "Disable" },
432 { MSR1(1), "Interrupt Group 1" },
433 { MSR1(2), "Interrupt Group 2" },
434 { MSR1(3), "Interrupt Group 3" },
435 { MSR1(4), "Interrupt Group 4" },
436 { MSR1(5), "Interrupt Group 5" },
437 { MSR1(6), "Interrupt Group 6" },
438 { MSR1(7), "Interrupt Group 7" },
439 { MSR1(8), "Interrupt Group 8" },
440 { MSR1(9), "Interrupt Group 9" },
441 { MSR1(10), "Interrupt Group 10" },
442 { MSR1(11), "Interrupt Group 11" },
443 { MSR1(12), "Interrupt Group 12" },
444 { MSR1(13), "Interrupt Group 13" },
445 { MSR1(14), "Interrupt Group 14" },
446 { MSR1(15), "Interrupt Group 15" },
447 { BITVAL_EOT }
448 }},
449 { 15, 4, "MAP_Y11", "Map Unrestricted Y Input 11", PRESENT_BIN, {
450 { MSR1(0), "Disable" },
451 { MSR1(1), "Interrupt Group 1" },
452 { MSR1(2), "Interrupt Group 2" },
453 { MSR1(3), "Interrupt Group 3" },
454 { MSR1(4), "Interrupt Group 4" },
455 { MSR1(5), "Interrupt Group 5" },
456 { MSR1(6), "Interrupt Group 6" },
457 { MSR1(7), "Interrupt Group 7" },
458 { MSR1(8), "Interrupt Group 8" },
459 { MSR1(9), "Interrupt Group 9" },
460 { MSR1(10), "Interrupt Group 10" },
461 { MSR1(11), "Interrupt Group 11" },
462 { MSR1(12), "Interrupt Group 12" },
463 { MSR1(13), "Interrupt Group 13" },
464 { MSR1(14), "Interrupt Group 14" },
465 { MSR1(15), "Interrupt Group 15" },
466 { BITVAL_EOT }
467 }},
468 { 11, 4, "MAP_Y10", "Map Unrestricted Y Input 10", PRESENT_BIN, {
469 { MSR1(0), "Disable" },
470 { MSR1(1), "Interrupt Group 1" },
471 { MSR1(2), "Interrupt Group 2" },
472 { MSR1(3), "Interrupt Group 3" },
473 { MSR1(4), "Interrupt Group 4" },
474 { MSR1(5), "Interrupt Group 5" },
475 { MSR1(6), "Interrupt Group 6" },
476 { MSR1(7), "Interrupt Group 7" },
477 { MSR1(8), "Interrupt Group 8" },
478 { MSR1(9), "Interrupt Group 9" },
479 { MSR1(10), "Interrupt Group 10" },
480 { MSR1(11), "Interrupt Group 11" },
481 { MSR1(12), "Interrupt Group 12" },
482 { MSR1(13), "Interrupt Group 13" },
483 { MSR1(14), "Interrupt Group 14" },
484 { MSR1(15), "Interrupt Group 15" },
485 { BITVAL_EOT }
486 }},
487 { 7, 4, "MAP_Y9", "Map Unrestricted Y Input 9", PRESENT_BIN, {
488 { MSR1(0), "Disable" },
489 { MSR1(1), "Interrupt Group 1" },
490 { MSR1(2), "Interrupt Group 2" },
491 { MSR1(3), "Interrupt Group 3" },
492 { MSR1(4), "Interrupt Group 4" },
493 { MSR1(5), "Interrupt Group 5" },
494 { MSR1(6), "Interrupt Group 6" },
495 { MSR1(7), "Interrupt Group 7" },
496 { MSR1(8), "Interrupt Group 8" },
497 { MSR1(9), "Interrupt Group 9" },
498 { MSR1(10), "Interrupt Group 10" },
499 { MSR1(11), "Interrupt Group 11" },
500 { MSR1(12), "Interrupt Group 12" },
501 { MSR1(13), "Interrupt Group 13" },
502 { MSR1(14), "Interrupt Group 14" },
503 { MSR1(15), "Interrupt Group 15" },
504 { BITVAL_EOT }
505 }},
506 { 3, 4, "MAP_Y8", "Map Unrestricted Y Input 8", PRESENT_BIN, {
507 { MSR1(0), "Disable" },
508 { MSR1(1), "Interrupt Group 1" },
509 { MSR1(2), "Interrupt Group 2" },
510 { MSR1(3), "Interrupt Group 3" },
511 { MSR1(4), "Interrupt Group 4" },
512 { MSR1(5), "Interrupt Group 5" },
513 { MSR1(6), "Interrupt Group 6" },
514 { MSR1(7), "Interrupt Group 7" },
515 { MSR1(8), "Interrupt Group 8" },
516 { MSR1(9), "Interrupt Group 9" },
517 { MSR1(10), "Interrupt Group 10" },
518 { MSR1(11), "Interrupt Group 11" },
519 { MSR1(12), "Interrupt Group 12" },
520 { MSR1(13), "Interrupt Group 13" },
521 { MSR1(14), "Interrupt Group 14" },
522 { MSR1(15), "Interrupt Group 15" },
523 { BITVAL_EOT }
524 }},
525 { BITS_EOT }
526 }},
527 { 0x51400022, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_LOW", "IRQ Mapper Unrestricted Z Select Low", {
528 { 63, 32, RESERVED },
529 { 31, 4, "MAP_Z7", "Map Unrestricted Z Input 7", PRESENT_BIN, {
530 { MSR1(0), "Disable" },
531 { MSR1(1), "Interrupt Group 1" },
532 { MSR1(2), "Interrupt Group 2" },
533 { MSR1(3), "Interrupt Group 3" },
534 { MSR1(4), "Interrupt Group 4" },
535 { MSR1(5), "Interrupt Group 5" },
536 { MSR1(6), "Interrupt Group 6" },
537 { MSR1(7), "Interrupt Group 7" },
538 { MSR1(8), "Interrupt Group 8" },
539 { MSR1(9), "Interrupt Group 9" },
540 { MSR1(10), "Interrupt Group 10" },
541 { MSR1(11), "Interrupt Group 11" },
542 { MSR1(12), "Interrupt Group 12" },
543 { MSR1(13), "Interrupt Group 13" },
544 { MSR1(14), "Interrupt Group 14" },
545 { MSR1(15), "Interrupt Group 15" },
546 { BITVAL_EOT }
547 }},
548 { 27, 4, "MAP_Z6", "Map Unrestricted Z Input 6", PRESENT_BIN, {
549 { MSR1(0), "Disable" },
550 { MSR1(1), "Interrupt Group 1" },
551 { MSR1(2), "Interrupt Group 2" },
552 { MSR1(3), "Interrupt Group 3" },
553 { MSR1(4), "Interrupt Group 4" },
554 { MSR1(5), "Interrupt Group 5" },
555 { MSR1(6), "Interrupt Group 6" },
556 { MSR1(7), "Interrupt Group 7" },
557 { MSR1(8), "Interrupt Group 8" },
558 { MSR1(9), "Interrupt Group 9" },
559 { MSR1(10), "Interrupt Group 10" },
560 { MSR1(11), "Interrupt Group 11" },
561 { MSR1(12), "Interrupt Group 12" },
562 { MSR1(13), "Interrupt Group 13" },
563 { MSR1(14), "Interrupt Group 14" },
564 { MSR1(15), "Interrupt Group 15" },
565 { BITVAL_EOT }
566 }},
567 { 23, 4, "MAP_Z5", "Map Unrestricted Z Input 5", PRESENT_BIN, {
568 { MSR1(0), "Disable" },
569 { MSR1(1), "Interrupt Group 1" },
570 { MSR1(2), "Interrupt Group 2" },
571 { MSR1(3), "Interrupt Group 3" },
572 { MSR1(4), "Interrupt Group 4" },
573 { MSR1(5), "Interrupt Group 5" },
574 { MSR1(6), "Interrupt Group 6" },
575 { MSR1(7), "Interrupt Group 7" },
576 { MSR1(8), "Interrupt Group 8" },
577 { MSR1(9), "Interrupt Group 9" },
578 { MSR1(10), "Interrupt Group 10" },
579 { MSR1(11), "Interrupt Group 11" },
580 { MSR1(12), "Interrupt Group 12" },
581 { MSR1(13), "Interrupt Group 13" },
582 { MSR1(14), "Interrupt Group 14" },
583 { MSR1(15), "Interrupt Group 15" },
584 { BITVAL_EOT }
585 }},
586 { 19, 4, "MAP_Z4", "Map Unrestricted Z Input 4", PRESENT_BIN, {
587 { MSR1(0), "Disable" },
588 { MSR1(1), "Interrupt Group 1" },
589 { MSR1(2), "Interrupt Group 2" },
590 { MSR1(3), "Interrupt Group 3" },
591 { MSR1(4), "Interrupt Group 4" },
592 { MSR1(5), "Interrupt Group 5" },
593 { MSR1(6), "Interrupt Group 6" },
594 { MSR1(7), "Interrupt Group 7" },
595 { MSR1(8), "Interrupt Group 8" },
596 { MSR1(9), "Interrupt Group 9" },
597 { MSR1(10), "Interrupt Group 10" },
598 { MSR1(11), "Interrupt Group 11" },
599 { MSR1(12), "Interrupt Group 12" },
600 { MSR1(13), "Interrupt Group 13" },
601 { MSR1(14), "Interrupt Group 14" },
602 { MSR1(15), "Interrupt Group 15" },
603 { BITVAL_EOT }
604 }},
605 { 15, 4, "MAP_Z3", "Map Unrestricted Z Input 3", PRESENT_BIN, {
606 { MSR1(0), "Disable" },
607 { MSR1(1), "Interrupt Group 1" },
608 { MSR1(2), "Interrupt Group 2" },
609 { MSR1(3), "Interrupt Group 3" },
610 { MSR1(4), "Interrupt Group 4" },
611 { MSR1(5), "Interrupt Group 5" },
612 { MSR1(6), "Interrupt Group 6" },
613 { MSR1(7), "Interrupt Group 7" },
614 { MSR1(8), "Interrupt Group 8" },
615 { MSR1(9), "Interrupt Group 9" },
616 { MSR1(10), "Interrupt Group 10" },
617 { MSR1(11), "Interrupt Group 11" },
618 { MSR1(12), "Interrupt Group 12" },
619 { MSR1(13), "Interrupt Group 13" },
620 { MSR1(14), "Interrupt Group 14" },
621 { MSR1(15), "Interrupt Group 15" },
622 { BITVAL_EOT }
623 }},
624 { 11, 4, "MAP_Z2", "Map Unrestricted Z Input 2", PRESENT_BIN, {
625 { MSR1(0), "Disable" },
626 { MSR1(1), "Interrupt Group 1" },
627 { MSR1(2), "Interrupt Group 2" },
628 { MSR1(3), "Interrupt Group 3" },
629 { MSR1(4), "Interrupt Group 4" },
630 { MSR1(5), "Interrupt Group 5" },
631 { MSR1(6), "Interrupt Group 6" },
632 { MSR1(7), "Interrupt Group 7" },
633 { MSR1(8), "Interrupt Group 8" },
634 { MSR1(9), "Interrupt Group 9" },
635 { MSR1(10), "Interrupt Group 10" },
636 { MSR1(11), "Interrupt Group 11" },
637 { MSR1(12), "Interrupt Group 12" },
638 { MSR1(13), "Interrupt Group 13" },
639 { MSR1(14), "Interrupt Group 14" },
640 { MSR1(15), "Interrupt Group 15" },
641 { BITVAL_EOT }
642 }},
643 { 7, 4, "MAP_Z1", "Map Unrestricted Z Input 1", PRESENT_BIN, {
644 { MSR1(0), "Disable" },
645 { MSR1(1), "Interrupt Group 1" },
646 { MSR1(2), "Interrupt Group 2" },
647 { MSR1(3), "Interrupt Group 3" },
648 { MSR1(4), "Interrupt Group 4" },
649 { MSR1(5), "Interrupt Group 5" },
650 { MSR1(6), "Interrupt Group 6" },
651 { MSR1(7), "Interrupt Group 7" },
652 { MSR1(8), "Interrupt Group 8" },
653 { MSR1(9), "Interrupt Group 9" },
654 { MSR1(10), "Interrupt Group 10" },
655 { MSR1(11), "Interrupt Group 11" },
656 { MSR1(12), "Interrupt Group 12" },
657 { MSR1(13), "Interrupt Group 13" },
658 { MSR1(14), "Interrupt Group 14" },
659 { MSR1(15), "Interrupt Group 15" },
660 { BITVAL_EOT }
661 }},
662 { 3, 4, "MAP_Z0", "Map Unrestricted Z Input 0", PRESENT_BIN, {
663 { MSR1(0), "Disable" },
664 { MSR1(1), "Interrupt Group 1" },
665 { MSR1(2), "Interrupt Group 2" },
666 { MSR1(3), "Interrupt Group 3" },
667 { MSR1(4), "Interrupt Group 4" },
668 { MSR1(5), "Interrupt Group 5" },
669 { MSR1(6), "Interrupt Group 6" },
670 { MSR1(7), "Interrupt Group 7" },
671 { MSR1(8), "Interrupt Group 8" },
672 { MSR1(9), "Interrupt Group 9" },
673 { MSR1(10), "Interrupt Group 10" },
674 { MSR1(11), "Interrupt Group 11" },
675 { MSR1(12), "Interrupt Group 12" },
676 { MSR1(13), "Interrupt Group 13" },
677 { MSR1(14), "Interrupt Group 14" },
678 { MSR1(15), "Interrupt Group 15" },
679 { BITVAL_EOT }
680 }},
681 { BITS_EOT }
682 }},
683 { 0x51400023, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_HIGH", "IRQ Mapper Unrestricted Z Select High", {
684 { 63, 32, RESERVED },
685 { 31, 4, "MAP_Z15", "Map Unrestricted Z Input 15", PRESENT_BIN, {
686 { MSR1(0), "Disable" },
687 { MSR1(1), "Interrupt Group 1" },
688 { MSR1(2), "Interrupt Group 2" },
689 { MSR1(3), "Interrupt Group 3" },
690 { MSR1(4), "Interrupt Group 4" },
691 { MSR1(5), "Interrupt Group 5" },
692 { MSR1(6), "Interrupt Group 6" },
693 { MSR1(7), "Interrupt Group 7" },
694 { MSR1(8), "Interrupt Group 8" },
695 { MSR1(9), "Interrupt Group 9" },
696 { MSR1(10), "Interrupt Group 10" },
697 { MSR1(11), "Interrupt Group 11" },
698 { MSR1(12), "Interrupt Group 12" },
699 { MSR1(13), "Interrupt Group 13" },
700 { MSR1(14), "Interrupt Group 14" },
701 { MSR1(15), "Interrupt Group 15" },
702 { BITVAL_EOT }
703 }},
704 { 27, 4, "MAP_Z14", "Map Unrestricted Z Input 14", PRESENT_BIN, {
705 { MSR1(0), "Disable" },
706 { MSR1(1), "Interrupt Group 1" },
707 { MSR1(2), "Interrupt Group 2" },
708 { MSR1(3), "Interrupt Group 3" },
709 { MSR1(4), "Interrupt Group 4" },
710 { MSR1(5), "Interrupt Group 5" },
711 { MSR1(6), "Interrupt Group 6" },
712 { MSR1(7), "Interrupt Group 7" },
713 { MSR1(8), "Interrupt Group 8" },
714 { MSR1(9), "Interrupt Group 9" },
715 { MSR1(10), "Interrupt Group 10" },
716 { MSR1(11), "Interrupt Group 11" },
717 { MSR1(12), "Interrupt Group 12" },
718 { MSR1(13), "Interrupt Group 13" },
719 { MSR1(14), "Interrupt Group 14" },
720 { MSR1(15), "Interrupt Group 15" },
721 { BITVAL_EOT }
722 }},
723 { 23, 4, "MAP_Z13", "Map Unrestricted Z Input 13", PRESENT_BIN, {
724 { MSR1(0), "Disable" },
725 { MSR1(1), "Interrupt Group 1" },
726 { MSR1(2), "Interrupt Group 2" },
727 { MSR1(3), "Interrupt Group 3" },
728 { MSR1(4), "Interrupt Group 4" },
729 { MSR1(5), "Interrupt Group 5" },
730 { MSR1(6), "Interrupt Group 6" },
731 { MSR1(7), "Interrupt Group 7" },
732 { MSR1(8), "Interrupt Group 8" },
733 { MSR1(9), "Interrupt Group 9" },
734 { MSR1(10), "Interrupt Group 10" },
735 { MSR1(11), "Interrupt Group 11" },
736 { MSR1(12), "Interrupt Group 12" },
737 { MSR1(13), "Interrupt Group 13" },
738 { MSR1(14), "Interrupt Group 14" },
739 { MSR1(15), "Interrupt Group 15" },
740 { BITVAL_EOT }
741 }},
742 { 19, 4, "MAP_Z12", "Map Unrestricted Z Input 12", PRESENT_BIN, {
743 { MSR1(0), "Disable" },
744 { MSR1(1), "Interrupt Group 1" },
745 { MSR1(2), "Interrupt Group 2" },
746 { MSR1(3), "Interrupt Group 3" },
747 { MSR1(4), "Interrupt Group 4" },
748 { MSR1(5), "Interrupt Group 5" },
749 { MSR1(6), "Interrupt Group 6" },
750 { MSR1(7), "Interrupt Group 7" },
751 { MSR1(8), "Interrupt Group 8" },
752 { MSR1(9), "Interrupt Group 9" },
753 { MSR1(10), "Interrupt Group 10" },
754 { MSR1(11), "Interrupt Group 11" },
755 { MSR1(12), "Interrupt Group 12" },
756 { MSR1(13), "Interrupt Group 13" },
757 { MSR1(14), "Interrupt Group 14" },
758 { MSR1(15), "Interrupt Group 15" },
759 { BITVAL_EOT }
760 }},
761 { 15, 4, "MAP_Z11", "Map Unrestricted Z Input 11", PRESENT_BIN, {
762 { MSR1(0), "Disable" },
763 { MSR1(1), "Interrupt Group 1" },
764 { MSR1(2), "Interrupt Group 2" },
765 { MSR1(3), "Interrupt Group 3" },
766 { MSR1(4), "Interrupt Group 4" },
767 { MSR1(5), "Interrupt Group 5" },
768 { MSR1(6), "Interrupt Group 6" },
769 { MSR1(7), "Interrupt Group 7" },
770 { MSR1(8), "Interrupt Group 8" },
771 { MSR1(9), "Interrupt Group 9" },
772 { MSR1(10), "Interrupt Group 10" },
773 { MSR1(11), "Interrupt Group 11" },
774 { MSR1(12), "Interrupt Group 12" },
775 { MSR1(13), "Interrupt Group 13" },
776 { MSR1(14), "Interrupt Group 14" },
777 { MSR1(15), "Interrupt Group 15" },
778 { BITVAL_EOT }
779 }},
780 { 11, 4, "MAP_Z10", "Map Unrestricted Z Input 10", PRESENT_BIN, {
781 { MSR1(0), "Disable" },
782 { MSR1(1), "Interrupt Group 1" },
783 { MSR1(2), "Interrupt Group 2" },
784 { MSR1(3), "Interrupt Group 3" },
785 { MSR1(4), "Interrupt Group 4" },
786 { MSR1(5), "Interrupt Group 5" },
787 { MSR1(6), "Interrupt Group 6" },
788 { MSR1(7), "Interrupt Group 7" },
789 { MSR1(8), "Interrupt Group 8" },
790 { MSR1(9), "Interrupt Group 9" },
791 { MSR1(10), "Interrupt Group 10" },
792 { MSR1(11), "Interrupt Group 11" },
793 { MSR1(12), "Interrupt Group 12" },
794 { MSR1(13), "Interrupt Group 13" },
795 { MSR1(14), "Interrupt Group 14" },
796 { MSR1(15), "Interrupt Group 15" },
797 { BITVAL_EOT }
798 }},
799 { 7, 4, "MAP_Z9", "Map Unrestricted Z Input 9", PRESENT_BIN, {
800 { MSR1(0), "Disable" },
801 { MSR1(1), "Interrupt Group 1" },
802 { MSR1(2), "Interrupt Group 2" },
803 { MSR1(3), "Interrupt Group 3" },
804 { MSR1(4), "Interrupt Group 4" },
805 { MSR1(5), "Interrupt Group 5" },
806 { MSR1(6), "Interrupt Group 6" },
807 { MSR1(7), "Interrupt Group 7" },
808 { MSR1(8), "Interrupt Group 8" },
809 { MSR1(9), "Interrupt Group 9" },
810 { MSR1(10), "Interrupt Group 10" },
811 { MSR1(11), "Interrupt Group 11" },
812 { MSR1(12), "Interrupt Group 12" },
813 { MSR1(13), "Interrupt Group 13" },
814 { MSR1(14), "Interrupt Group 14" },
815 { MSR1(15), "Interrupt Group 15" },
816 { BITVAL_EOT }
817 }},
818 { 3, 4, "MAP_Z8", "Map Unrestricted Z Input 8", PRESENT_BIN, {
819 { MSR1(0), "Disable" },
820 { MSR1(1), "Interrupt Group 1" },
821 { MSR1(2), "Interrupt Group 2" },
822 { MSR1(3), "Interrupt Group 3" },
823 { MSR1(4), "Interrupt Group 4" },
824 { MSR1(5), "Interrupt Group 5" },
825 { MSR1(6), "Interrupt Group 6" },
826 { MSR1(7), "Interrupt Group 7" },
827 { MSR1(8), "Interrupt Group 8" },
828 { MSR1(9), "Interrupt Group 9" },
829 { MSR1(10), "Interrupt Group 10" },
830 { MSR1(11), "Interrupt Group 11" },
831 { MSR1(12), "Interrupt Group 12" },
832 { MSR1(13), "Interrupt Group 13" },
833 { MSR1(14), "Interrupt Group 14" },
834 { MSR1(15), "Interrupt Group 15" },
835 { BITVAL_EOT }
836 }},
837 { BITS_EOT }
838 }},
839 { 0x51400024, MSRTYPE_RDWR, MSR2(0, 0xffff), "PIC_IRQM_PRIM", "IRQ Mapper Primary Mask", {
840 { 63, 48, RESERVED },
841 { 15, 1, "PRIM15_MSK", "Primary Input 15 Mask", PRESENT_DEC, {
842 { MSR1(0), "Mask the interrupt source" },
843 { MSR1(1), "Do not mask the interrupt source" },
844 { BITVAL_EOT }
845 }},
846 { 14, 1, "PRIM14_MSK", "Primary Input 14 Mask", PRESENT_DEC, {
847 { MSR1(0), "Mask the interrupt source" },
848 { MSR1(1), "Do not mask the interrupt source" },
849 { BITVAL_EOT }
850 }},
851 { 13, 1, "PRIM13_MSK", "Primary Input 13 Mask", PRESENT_DEC, {
852 { MSR1(0), "Mask the interrupt source" },
853 { MSR1(1), "Do not mask the interrupt source" },
854 { BITVAL_EOT }
855 }},
856 { 12, 1, "PRIM12_MSK", "Primary Input 12 Mask", PRESENT_DEC, {
857 { MSR1(0), "Mask the interrupt source" },
858 { MSR1(1), "Do not mask the interrupt source" },
859 { BITVAL_EOT }
860 }},
861 { 11, 1, "PRIM11_MSK", "Primary Input 11 Mask", PRESENT_DEC, {
862 { MSR1(0), "Mask the interrupt source" },
863 { MSR1(1), "Do not mask the interrupt source" },
864 { BITVAL_EOT }
865 }},
866 { 10, 1, "PRIM10_MSK", "Primary Input 10 Mask", PRESENT_DEC, {
867 { MSR1(0), "Mask the interrupt source" },
868 { MSR1(1), "Do not mask the interrupt source" },
869 { BITVAL_EOT }
870 }},
871 { 9, 1, "PRIM9_MSK", "Primary Input 9 Mask", PRESENT_DEC, {
872 { MSR1(0), "Mask the interrupt source" },
873 { MSR1(1), "Do not mask the interrupt source" },
874 { BITVAL_EOT }
875 }},
876 { 8, 1, "PRIM8_MSK", "Primary Input 8 Mask", PRESENT_DEC, {
877 { MSR1(0), "Mask the interrupt source" },
878 { MSR1(1), "Do not mask the interrupt source" },
879 { BITVAL_EOT }
880 }},
881 { 7, 1, "PRIM7_MSK", "Primary Input 7 Mask", PRESENT_DEC, {
882 { MSR1(0), "Mask the interrupt source" },
883 { MSR1(1), "Do not mask the interrupt source" },
884 { BITVAL_EOT }
885 }},
886 { 6, 1, "PRIM6_MSK", "Primary Input 6 Mask", PRESENT_DEC, {
887 { MSR1(0), "Mask the interrupt source" },
888 { MSR1(1), "Do not mask the interrupt source" },
889 { BITVAL_EOT }
890 }},
891 { 5, 1, "PRIM5_MSK", "Primary Input 5 Mask", PRESENT_DEC, {
892 { MSR1(0), "Mask the interrupt source" },
893 { MSR1(1), "Do not mask the interrupt source" },
894 { BITVAL_EOT }
895 }},
896 { 4, 1, "PRIM4_MSK", "Primary Input 4 Mask", PRESENT_DEC, {
897 { MSR1(0), "Mask the interrupt source" },
898 { MSR1(1), "Do not mask the interrupt source" },
899 { BITVAL_EOT }
900 }},
901 { 3, 1, "PRIM3_MSK", "Primary Input 3 Mask", PRESENT_DEC, {
902 { MSR1(0), "Mask the interrupt source" },
903 { MSR1(1), "Do not mask the interrupt source" },
904 { BITVAL_EOT }
905 }},
906 { 2, 1, RESERVED },
907 { 1, 1, "PRIM1_MSK", "Primary Input 1 Mask", PRESENT_DEC, {
908 { MSR1(0), "Mask the interrupt source" },
909 { MSR1(1), "Do not mask the interrupt source" },
910 { BITVAL_EOT }
911 }},
912 { 0, 1, "PRIM0_MSK", "Primary Input 0 Mask", PRESENT_DEC, {
913 { MSR1(0), "Mask the interrupt source" },
914 { MSR1(1), "Do not mask the interrupt source" },
915 { BITVAL_EOT }
916 }},
917 { BITS_EOT }
918 }},
919 { 0x51400025, MSRTYPE_RDWR, MSR2(0, 0), "PIC_IRQM_LPC", "IRQ Mapper LPC Mask", {
920 { 63, 48, RESERVED },
921 { 15, 1, "LPC15_EN", "LPC Input 15 Enable", PRESENT_DEC, {
922 { MSR1(0), "Disable interrupt source" },
923 { MSR1(1), "Enable interrupt source" },
924 { BITVAL_EOT }
925 }},
926 { 14, 1, "LPC14_EN", "LPC Input 14 Enable", PRESENT_DEC, {
927 { MSR1(0), "Disable interrupt source" },
928 { MSR1(1), "Enable interrupt source" },
929 { BITVAL_EOT }
930 }},
931 { 13, 1, "LPC13_EN", "LPC Input 13 Enable", PRESENT_DEC, {
932 { MSR1(0), "Disable interrupt source" },
933 { MSR1(1), "Enable interrupt source" },
934 { BITVAL_EOT }
935 }},
936 { 12, 1, "LPC12_EN", "LPC Input 12 Enable", PRESENT_DEC, {
937 { MSR1(0), "Disable interrupt source" },
938 { MSR1(1), "Enable interrupt source" },
939 { BITVAL_EOT }
940 }},
941 { 11, 1, "LPC11_EN", "LPC Input 11 Enable", PRESENT_DEC, {
942 { MSR1(0), "Disable interrupt source" },
943 { MSR1(1), "Enable interrupt source" },
944 { BITVAL_EOT }
945 }},
946 { 10, 1, "LPC10_EN", "LPC Input 10 Enable", PRESENT_DEC, {
947 { MSR1(0), "Disable interrupt source" },
948 { MSR1(1), "Enable interrupt source" },
949 { BITVAL_EOT }
950 }},
951 { 9, 1, "LPC9_EN", "LPC Input 9 Enable", PRESENT_DEC, {
952 { MSR1(0), "Disable interrupt source" },
953 { MSR1(1), "Enable interrupt source" },
954 { BITVAL_EOT }
955 }},
956 { 8, 1, "LPC8_EN", "LPC Input 8 Enable", PRESENT_DEC, {
957 { MSR1(0), "Disable interrupt source" },
958 { MSR1(1), "Enable interrupt source" },
959 { BITVAL_EOT }
960 }},
961 { 7, 1, "LPC7_EN", "LPC Input 7 Enable", PRESENT_DEC, {
962 { MSR1(0), "Disable interrupt source" },
963 { MSR1(1), "Enable interrupt source" },
964 { BITVAL_EOT }
965 }},
966 { 6, 1, "LPC6_EN", "LPC Input 6 Enable", PRESENT_DEC, {
967 { MSR1(0), "Disable interrupt source" },
968 { MSR1(1), "Enable interrupt source" },
969 { BITVAL_EOT }
970 }},
971 { 5, 1, "LPC5_EN", "LPC Input 5 Enable", PRESENT_DEC, {
972 { MSR1(0), "Disable interrupt source" },
973 { MSR1(1), "Enable interrupt source" },
974 { BITVAL_EOT }
975 }},
976 { 4, 1, "LPC4_EN", "LPC Input 4 Enable", PRESENT_DEC, {
977 { MSR1(0), "Disable interrupt source" },
978 { MSR1(1), "Enable interrupt source" },
979 { BITVAL_EOT }
980 }},
981 { 3, 1, "LPC3_EN", "LPC Input 3 Enable", PRESENT_DEC, {
982 { MSR1(0), "Disable interrupt source" },
983 { MSR1(1), "Enable interrupt source" },
984 { BITVAL_EOT }
985 }},
986 { 2, 1, RESERVED },
987 { 1, 1, "LPC1_EN", "LPC Input 1 Enable", PRESENT_DEC, {
988 { MSR1(0), "Disable interrupt source" },
989 { MSR1(1), "Enable interrupt source" },
990 { BITVAL_EOT }
991 }},
992 { 0, 1, "LPC0_EN", "LPC Input 0 Enable", PRESENT_DEC, {
993 { MSR1(0), "Disable interrupt source" },
994 { MSR1(1), "Enable interrupt source" },
995 { BITVAL_EOT }
996 }},
997 { BITS_EOT }
998 }},
999 { 0x51400026, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_LOW", "IRQ Mapper Extended Interrupt Request Status Low", {
1000 { 63, 32, RESERVED },
1001 { 31, 1, "IG7_STS_Z", "Unrestricted Source Z Input 7", PRESENT_BIN, {
1002 { MSR1(0), "No interrupt" },
1003 { MSR1(1), "INTERRUPT" },
1004 { BITVAL_EOT }
1005 }},
1006 { 30, 1, "IG7_STS_Y", "Unrestricted Source Y Input 7", PRESENT_BIN, {
1007 { MSR1(0), "No interrupt" },
1008 { MSR1(1), "INTERRUPT" },
1009 { BITVAL_EOT }
1010 }},
1011 { 29, 1, "IG7_STS_LPC", "LPC Input 7", PRESENT_BIN, {
1012 { MSR1(0), "No interrupt" },
1013 { MSR1(1), "INTERRUPT" },
1014 { BITVAL_EOT }
1015 }},
1016 { 28, 1, "IG7_STS_PRIM", "Primary Input 7", PRESENT_BIN, {
1017 { MSR1(0), "No interrupt" },
1018 { MSR1(1), "INTERRUPT" },
1019 { BITVAL_EOT }
1020 }},
1021 { 27, 1, "IG6_STS_Z", "Unrestricted Source Z Input 6", PRESENT_BIN, {
1022 { MSR1(0), "No interrupt" },
1023 { MSR1(1), "INTERRUPT" },
1024 { BITVAL_EOT }
1025 }},
1026 { 26, 1, "IG6_STS_Y", "Unrestricted Source Y Input 6", PRESENT_BIN, {
1027 { MSR1(0), "No interrupt" },
1028 { MSR1(1), "INTERRUPT" },
1029 { BITVAL_EOT }
1030 }},
1031 { 25, 1, "IG6_STS_LPC", "LPC Input 6", PRESENT_BIN, {
1032 { MSR1(0), "No interrupt" },
1033 { MSR1(1), "INTERRUPT" },
1034 { BITVAL_EOT }
1035 }},
1036 { 24, 1, "IG6_STS_PRIM", "Primary Input 6", PRESENT_BIN, {
1037 { MSR1(0), "No interrupt" },
1038 { MSR1(1), "INTERRUPT" },
1039 { BITVAL_EOT }
1040 }},
1041 { 23, 1, "IG5_STS_Z", "Unrestricted Source Z Input 5", PRESENT_BIN, {
1042 { MSR1(0), "No interrupt" },
1043 { MSR1(1), "INTERRUPT" },
1044 { BITVAL_EOT }
1045 }},
1046 { 22, 1, "IG5_STS_Y", "Unrestricted Source Y Input 5", PRESENT_BIN, {
1047 { MSR1(0), "No interrupt" },
1048 { MSR1(1), "INTERRUPT" },
1049 { BITVAL_EOT }
1050 }},
1051 { 21, 1, "IG5_STS_LPC", "LPC Input 5", PRESENT_BIN, {
1052 { MSR1(0), "No interrupt" },
1053 { MSR1(1), "INTERRUPT" },
1054 { BITVAL_EOT }
1055 }},
1056 { 20, 1, "IG5_STS_PRIM", "Primary Input 5", PRESENT_BIN, {
1057 { MSR1(0), "No interrupt" },
1058 { MSR1(1), "INTERRUPT" },
1059 { BITVAL_EOT }
1060 }},
1061 { 19, 1, "IG4_STS_Z", "Unrestricted Source Z Input 4", PRESENT_BIN, {
1062 { MSR1(0), "No interrupt" },
1063 { MSR1(1), "INTERRUPT" },
1064 { BITVAL_EOT }
1065 }},
1066 { 18, 1, "IG4_STS_Y", "Unrestricted Source Y Input 4", PRESENT_BIN, {
1067 { MSR1(0), "No interrupt" },
1068 { MSR1(1), "INTERRUPT" },
1069 { BITVAL_EOT }
1070 }},
1071 { 17, 1, "IG4_STS_LPC", "LPC Input 4", PRESENT_BIN, {
1072 { MSR1(0), "No interrupt" },
1073 { MSR1(1), "INTERRUPT" },
1074 { BITVAL_EOT }
1075 }},
1076 { 16, 1, "IG4_STS_PRIM", "Primary Input 4", PRESENT_BIN, {
1077 { MSR1(0), "No interrupt" },
1078 { MSR1(1), "INTERRUPT" },
1079 { BITVAL_EOT }
1080 }},
1081 { 15, 1, "IG3_STS_Z", "Unrestricted Source Z Input 3", PRESENT_BIN, {
1082 { MSR1(0), "No interrupt" },
1083 { MSR1(1), "INTERRUPT" },
1084 { BITVAL_EOT }
1085 }},
1086 { 14, 1, "IG3_STS_Y", "Unrestricted Source Y Input 3", PRESENT_BIN, {
1087 { MSR1(0), "No interrupt" },
1088 { MSR1(1), "INTERRUPT" },
1089 { BITVAL_EOT }
1090 }},
1091 { 13, 1, "IG3_STS_LPC", "LPC Input 3", PRESENT_BIN, {
1092 { MSR1(0), "No interrupt" },
1093 { MSR1(1), "INTERRUPT" },
1094 { BITVAL_EOT }
1095 }},
1096 { 12, 1, "IG3_STS_PRIM", "Primary Input 3", PRESENT_BIN, {
1097 { MSR1(0), "No interrupt" },
1098 { MSR1(1), "INTERRUPT" },
1099 { BITVAL_EOT }
1100 }},
1101 { 11, 1, "IG2_STS_Z", "Unrestricted Source Z Input 2", PRESENT_BIN, {
1102 { MSR1(0), "No interrupt" },
1103 { MSR1(1), "INTERRUPT" },
1104 { BITVAL_EOT }
1105 }},
1106 { 10, 1, "IG2_STS_Y", "Unrestricted Source Y Input 2", PRESENT_BIN, {
1107 { MSR1(0), "No interrupt" },
1108 { MSR1(1), "INTERRUPT" },
1109 { BITVAL_EOT }
1110 }},
1111 { 9, 2, RESERVED },
1112 { 7, 1, "IG1_STS_Z", "Unrestricted Source Z Input 1", PRESENT_BIN, {
1113 { MSR1(0), "No interrupt" },
1114 { MSR1(1), "INTERRUPT" },
1115 { BITVAL_EOT }
1116 }},
1117 { 6, 1, "IG1_STS_Y", "Unrestricted Source Y Input 1", PRESENT_BIN, {
1118 { MSR1(0), "No interrupt" },
1119 { MSR1(1), "INTERRUPT" },
1120 { BITVAL_EOT }
1121 }},
1122 { 5, 1, "IG1_STS_LPC", "LPC Input 1", PRESENT_BIN, {
1123 { MSR1(0), "No interrupt" },
1124 { MSR1(1), "INTERRUPT" },
1125 { BITVAL_EOT }
1126 }},
1127 { 4, 1, "IG1_STS_PRIM", "Primary Input 1", PRESENT_BIN, {
1128 { MSR1(0), "No interrupt" },
1129 { MSR1(1), "INTERRUPT" },
1130 { BITVAL_EOT }
1131 }},
1132 { 3, 2, RESERVED },
1133 { 1, 1, "IG0_STS_LPC", "LPC Input 0", PRESENT_BIN, {
1134 { MSR1(0), "No interrupt" },
1135 { MSR1(1), "INTERRUPT" },
1136 { BITVAL_EOT }
1137 }},
1138 { 0, 1, "IG0_STS_PRIM", "Primary Input 0", PRESENT_BIN, {
1139 { MSR1(0), "No interrupt" },
1140 { MSR1(1), "INTERRUPT" },
1141 { BITVAL_EOT }
1142 }},
1143 { BITS_EOT }
1144 }},
1145 { 0x51400027, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_HIGH", "IRQ Mapper Extended Interrupt Request Status High", {
1146 { 63, 32, RESERVED },
1147 { 31, 1, "IG15_STS_Z", "Unrestricted Source Z Input 15", PRESENT_BIN, {
1148 { MSR1(0), "No interrupt" },
1149 { MSR1(1), "INTERRUPT" },
1150 { BITVAL_EOT }
1151 }},
1152 { 30, 1, "IG15_STS_Y", "Unrestricted Source Y Input 15", PRESENT_BIN, {
1153 { MSR1(0), "No interrupt" },
1154 { MSR1(1), "INTERRUPT" },
1155 { BITVAL_EOT }
1156 }},
1157 { 29, 1, "IG15_STS_LPC", "LPC Input 15", PRESENT_BIN, {
1158 { MSR1(0), "No interrupt" },
1159 { MSR1(1), "INTERRUPT" },
1160 { BITVAL_EOT }
1161 }},
1162 { 28, 1, "IG15_STS_PRIM", "Primary Input 15", PRESENT_BIN, {
1163 { MSR1(0), "No interrupt" },
1164 { MSR1(1), "INTERRUPT" },
1165 { BITVAL_EOT }
1166 }},
1167 { 27, 1, "IG14_STS_Z", "Unrestricted Source Z Input 14", PRESENT_BIN, {
1168 { MSR1(0), "No interrupt" },
1169 { MSR1(1), "INTERRUPT" },
1170 { BITVAL_EOT }
1171 }},
1172 { 26, 1, "IG14_STS_Y", "Unrestricted Source Y Input 14", PRESENT_BIN, {
1173 { MSR1(0), "No interrupt" },
1174 { MSR1(1), "INTERRUPT" },
1175 { BITVAL_EOT }
1176 }},
1177 { 25, 1, "IG14_STS_LPC", "LPC Input 14", PRESENT_BIN, {
1178 { MSR1(0), "No interrupt" },
1179 { MSR1(1), "INTERRUPT" },
1180 { BITVAL_EOT }
1181 }},
1182 { 24, 1, "IG14_STS_PRIM", "Primary Input 14", PRESENT_BIN, {
1183 { MSR1(0), "No interrupt" },
1184 { MSR1(1), "INTERRUPT" },
1185 { BITVAL_EOT }
1186 }},
1187 { 23, 1, "IG13_STS_Z", "Unrestricted Source Z Input 13", PRESENT_BIN, {
1188 { MSR1(0), "No interrupt" },
1189 { MSR1(1), "INTERRUPT" },
1190 { BITVAL_EOT }
1191 }},
1192 { 22, 1, "IG13_STS_Y", "Unrestricted Source Y Input 13", PRESENT_BIN, {
1193 { MSR1(0), "No interrupt" },
1194 { MSR1(1), "INTERRUPT" },
1195 { BITVAL_EOT }
1196 }},
1197 { 21, 1, "IG13_STS_LPC", "LPC Input 13", PRESENT_BIN, {
1198 { MSR1(0), "No interrupt" },
1199 { MSR1(1), "INTERRUPT" },
1200 { BITVAL_EOT }
1201 }},
1202 { 20, 1, "IG13_STS_PRIM", "Primary Input 13", PRESENT_BIN, {
1203 { MSR1(0), "No interrupt" },
1204 { MSR1(1), "INTERRUPT" },
1205 { BITVAL_EOT }
1206 }},
1207 { 19, 1, "IG12_STS_Z", "Unrestricted Source Z Input 12", PRESENT_BIN, {
1208 { MSR1(0), "No interrupt" },
1209 { MSR1(1), "INTERRUPT" },
1210 { BITVAL_EOT }
1211 }},
1212 { 18, 1, "IG12_STS_Y", "Unrestricted Source Y Input 12", PRESENT_BIN, {
1213 { MSR1(0), "No interrupt" },
1214 { MSR1(1), "INTERRUPT" },
1215 { BITVAL_EOT }
1216 }},
1217 { 17, 1, "IG12_STS_LPC", "LPC Input 12", PRESENT_BIN, {
1218 { MSR1(0), "No interrupt" },
1219 { MSR1(1), "INTERRUPT" },
1220 { BITVAL_EOT }
1221 }},
1222 { 16, 1, "IG12_STS_PRIM", "Primary Input 12", PRESENT_BIN, {
1223 { MSR1(0), "No interrupt" },
1224 { MSR1(1), "INTERRUPT" },
1225 { BITVAL_EOT }
1226 }},
1227 { 15, 1, "IG11_STS_Z", "Unrestricted Source Z Input 11", PRESENT_BIN, {
1228 { MSR1(0), "No interrupt" },
1229 { MSR1(1), "INTERRUPT" },
1230 { BITVAL_EOT }
1231 }},
1232 { 14, 1, "IG11_STS_Y", "Unrestricted Source Y Input 11", PRESENT_BIN, {
1233 { MSR1(0), "No interrupt" },
1234 { MSR1(1), "INTERRUPT" },
1235 { BITVAL_EOT }
1236 }},
1237 { 13, 1, "IG11_STS_LPC", "LPC Input 11", PRESENT_BIN, {
1238 { MSR1(0), "No interrupt" },
1239 { MSR1(1), "INTERRUPT" },
1240 { BITVAL_EOT }
1241 }},
1242 { 12, 1, "IG11_STS_PRIM", "Primary Input 11", PRESENT_BIN, {
1243 { MSR1(0), "No interrupt" },
1244 { MSR1(1), "INTERRUPT" },
1245 { BITVAL_EOT }
1246 }},
1247 { 11, 1, "IG10_STS_Z", "Unrestricted Source Z Input 10", PRESENT_BIN, {
1248 { MSR1(0), "No interrupt" },
1249 { MSR1(1), "INTERRUPT" },
1250 { BITVAL_EOT }
1251 }},
1252 { 10, 1, "IG10_STS_Y", "Unrestricted Source Y Input 10", PRESENT_BIN, {
1253 { MSR1(0), "No interrupt" },
1254 { MSR1(1), "INTERRUPT" },
1255 { BITVAL_EOT }
1256 }},
1257 { 9, 1, "IG10_STS_LPC", "LPC Input 10", PRESENT_BIN, {
1258 { MSR1(0), "No interrupt" },
1259 { MSR1(1), "INTERRUPT" },
1260 { BITVAL_EOT }
1261 }},
1262 { 8, 1, "IG10_STS_PRIM", "Primary Input 10", PRESENT_BIN, {
1263 { MSR1(0), "No interrupt" },
1264 { MSR1(1), "INTERRUPT" },
1265 { BITVAL_EOT }
1266 }},
1267 { 7, 1, "IG9_STS_Z", "Unrestricted Source Z Input 9", PRESENT_BIN, {
1268 { MSR1(0), "No interrupt" },
1269 { MSR1(1), "INTERRUPT" },
1270 { BITVAL_EOT }
1271 }},
1272 { 6, 1, "IG9_STS_Y", "Unrestricted Source Y Input 9", PRESENT_BIN, {
1273 { MSR1(0), "No interrupt" },
1274 { MSR1(1), "INTERRUPT" },
1275 { BITVAL_EOT }
1276 }},
1277 { 5, 1, "IG9_STS_LPC", "LPC Input 9", PRESENT_BIN, {
1278 { MSR1(0), "No interrupt" },
1279 { MSR1(1), "INTERRUPT" },
1280 { BITVAL_EOT }
1281 }},
1282 { 4, 1, "IG9_STS_PRIM", "Primary Input 9", PRESENT_BIN, {
1283 { MSR1(0), "No interrupt" },
1284 { MSR1(1), "INTERRUPT" },
1285 { BITVAL_EOT }
1286 }},
1287 { 3, 1, "IG8_STS_Z", "Unrestricted Source Z Input 8", PRESENT_BIN, {
1288 { MSR1(0), "No interrupt" },
1289 { MSR1(1), "INTERRUPT" },
1290 { BITVAL_EOT }
1291 }},
1292 { 2, 1, "IG8_STS_Y", "Unrestricted Source Y Input 8", PRESENT_BIN, {
1293 { MSR1(0), "No interrupt" },
1294 { MSR1(1), "INTERRUPT" },
1295 { BITVAL_EOT }
1296 }},
1297 { 1, 1, "IG8_STS_LPC", "LPC Input 8", PRESENT_BIN, {
1298 { MSR1(0), "No interrupt" },
1299 { MSR1(1), "INTERRUPT" },
1300 { BITVAL_EOT }
1301 }},
1302 { 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, {
1303 { MSR1(0), "No interrupt" },
1304 { MSR1(1), "INTERRUPT" },
1305 { BITVAL_EOT }
1306 }},
1307 { BITS_EOT }
1308 }},
Christian Gmeiner42b808e2012-07-11 09:31:12 +0200[diff] [blame]1309 { 0x5140004e, MSRTYPE_RDWR, MSR2(0, 0), "LPC_SERIRQ", "LPC Serial IRQ Control", {
1310 { 31, 16, "INVERT", "IRQ[x] input is active low", PRESENT_HEX },
1311 { 15, 8, RESERVED },
1312 { 7, 1, "SIRQ_EN", "Serial IRQ Enable", PRESENT_BIN, {
1313 { MSR1(0), "Disable" },
1314 { MSR1(1), "Enable" },
1315 { BITVAL_EOT }
1316 }},
1317 { 6, 1, "SIRQ_MODE", "Serial IRQ Interface Mode", PRESENT_BIN, {
1318 { MSR1(0), "Continuous (Idle)" },
1319 { MSR1(1), "Quiet (Active)" },
1320 { BITVAL_EOT }
1321 }},
1322 { 5, 4, "IRQ_FRAME", "IRQ Data Frames", PRESENT_BIN, {
1323 { MSR1(0), "17" },
1324 { MSR1(1), "18" },
1325 { MSR1(2), "19" },
1326 { MSR1(3), "20" },
1327 { MSR1(4), "21" },
1328 { MSR1(5), "22" },
1329 { MSR1(6), "23" },
1330 { MSR1(7), "24" },
1331 { MSR1(8), "25" },
1332 { MSR1(9), "26" },
1333 { MSR1(10), "27" },
1334 { MSR1(11), "28" },
1335 { MSR1(12), "29" },
1336 { MSR1(13), "30" },
1337 { MSR1(14), "31" },
1338 { MSR1(15), "32" },
1339 { BITVAL_EOT }
1340 }},
1341 { 1, 2, "START_FPW", "Start Frame Pulse Width", PRESENT_BIN, {
1342 { MSR1(0), "4 clocks" },
1343 { MSR1(1), "6 clocks" },
1344 { MSR1(2), "8 clocks" },
1345 { MSR1(3), "Reserved" },
1346 { BITVAL_EOT }
1347 }},
1348 { BITS_EOT }
1349 }},
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]1350 { MSR_EOT }
1351};