blob: 0b33e24dba084d18737281fccad5c37f5af220ad [file] [log] [blame]
Kerry Sheh3c71a852012-02-07 20:31:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kerry Sheh3c71a852012-02-07 20:31:40 +080014 */
15
Edward O'Callaghan031cf212014-07-18 06:37:27 +100016#ifndef SUPERIO_SMSC_SIO1306_H
17#define SUPERIO_SMSC_SIO1306_H
18
Kerry Sheh3c71a852012-02-07 20:31:40 +080019#define SIO1036_SP1 0 /* Com1 */
20
21#define UART_POWER_DOWN (1 << 7)
22#define LPT_POWER_DOWN (1 << 2)
23#define IR_OUPUT_MUX (1 << 6)
Edward O'Callaghan031cf212014-07-18 06:37:27 +100024
Edward O'Callaghan47b80752014-08-02 20:08:35 +100025#include <arch/io.h>
26#include <stdint.h>
27
Edward O'Callaghan85836c22014-07-09 20:26:25 +100028void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
Edward O'Callaghan47b80752014-08-02 20:08:35 +100029
Edward O'Callaghan031cf212014-07-18 06:37:27 +100030#endif /* SUPERIO_SMSC_1306_H */