blob: f0fa3cda0f4eabc58c8cf80883fd70bb6cddf303 [file] [log] [blame]
Kerry Shehc94940c2012-02-07 20:31:40 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kerry Shehc94940c2012-02-07 20:31:40 +080014 */
15
16#ifndef SUPERIO_SCH_4037_H
17#define SUPERIO_SCH_4037_H
18
Kerry Shehc94940c2012-02-07 20:31:40 +080019#define SCH4037_FDD 0 /* FDD */
20#define SCH4037_LPT 3 /* LPT */
21#define SMSCSUPERIO_SP1 4 /* Com1 */
22#define SMSCSUPERIO_SP2 5 /* Com2 */
23#define SCH4037_RTC 6 /* RTC */
24#define SCH4037_KBC 7 /* KBC */
25#define SCH4037_HWM 8 /* HWM */
26#define SCH4037_RUNTIME 0x0A /* Runtime */
27#define SCH4037_XBUS 0x0B /* X-BUS */
28
Edward O'Callaghand2da65e2014-08-06 21:32:50 +100029void sch4037_early_init(unsigned port);
30
31#endif /* SUPERIO_SCH_4037_H */