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Sven Schnelle82e36172011-02-05 12:26:07 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Sven Schnelle82e36172011-02-05 12:26:07 +000015 */
16
17#ifndef SUPERIO_NSC_PC87392_H
18#define SUPERIO_NSC_PC87392_H
19
20#define PC87392_FDC 0x00
21#define PC87392_PP 0x01
22#define PC87392_SP2 0x02
23#define PC87392_SP1 0x03
24#define PC87392_GPIO 0x07
25#define PC87392_WDT 0x0A
26
Sven Schnelle1aba0962011-04-01 07:28:50 +000027#define PC87392_GPIO_PIN_OE 0x01
28#define PC87392_GPIO_PIN_TYPE_PUSH_PULL 0x02
29#define PC87392_GPIO_PIN_PULLUP 0x04
30#define PC87392_GPIO_PIN_LOCK 0x08
31#define PC87392_GPIO_PIN_TRIG_LEVEL 0x10
32#define PC87392_GPIO_PIN_TRIG_LOW 0x20
33#define PC87392_GPIO_PIN_DEBOUNCE 0x40
34
35#define PC87392_GPIO_PIN_TRIGGERS_IRQ 0x01
36#define PC87392_GPIO_PIN_TRIGGERS_SMI 0x02
37
Sven Schnelle82e36172011-02-05 12:26:07 +000038#endif