blob: ce0e0662691b175be659a80bf1cbbd0e9730fab7 [file] [log] [blame]
Fabian Kunkelf75c3b42015-05-25 17:04:28 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
5 * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
6 * (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Fabian Kunkelf75c3b42015-05-25 17:04:28 +020017 */
18
19#include <arch/io.h>
20#include <device/device.h>
21#include <device/pnp.h>
22#include <superio/conf_mode.h>
23#include <console/console.h>
24#include <stdlib.h>
25#include <pc80/keyboard.h>
26#include "f81866d.h"
27#include "fintek_internal.h"
28
29static void f81866d_init(struct device *dev)
30{
31 if (!dev->enabled)
32 return;
33
34 switch (dev->path.pnp.device) {
35 /* TODO: Might potentially need extra code for serial, wdt etc. */
36 case F81866D_KBC:
37 pc_keyboard_init();
38 break;
39 case F81866D_HWM:
40 // Fixing temp sensor read out and init Fan control
41 f81866d_hwm_init(dev);
42 break;
43 }
44}
45
46static struct device_operations ops = {
47 .read_resources = pnp_read_resources,
48 .set_resources = pnp_set_resources,
49 .enable_resources = pnp_enable_resources,
50 .enable = pnp_alt_enable,
51 .init = f81866d_init,
52 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
53};
54
55static struct pnp_info pnp_dev_info[] = {
56 /* TODO: Some of the 0x7f8 etc. values may not be correct. */
57 { &ops, F81866D_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
58 { &ops, F81866D_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
59 { &ops, F81866D_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
60 { &ops, F81866D_SP3, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
61 { &ops, F81866D_SP4, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
62 { &ops, F81866D_SP5, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
63 { &ops, F81866D_SP6, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
64 { &ops, F81866D_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
65 { &ops, F81866D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
66 { &ops, F81866D_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
67 { &ops, F81866D_GPIO, PNP_IRQ0, },
68 { &ops, F81866D_PME, },
69 { &ops, F81866D_WDT, },
70};
71
72static void enable_dev(struct device *dev)
73{
74 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
75}
76
77struct chip_operations superio_fintek_f81866d_ops = {
78 CHIP_NAME("Fintek F81866AD-I Super I/O")
79 .enable_dev = enable_dev
80};