Edward O'Callaghan | cf7b498 | 2014-04-23 21:52:25 +1000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Edward O'Callaghan | cf7b498 | 2014-04-23 21:52:25 +1000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
| 18 | * A generic romstage (pre-ram) driver for Fintek variant Super I/O chips. |
| 19 | * |
| 20 | * The following is derived directly from the vendor Fintek's data-sheets: |
| 21 | * |
| 22 | * To toggle between `configuration mode` and `normal operation mode` as to |
| 23 | * manipulation the various LDN's in Fintek Super I/O's we are required to pass |
| 24 | * magic numbers `passwords keys`. |
| 25 | * |
| 26 | * FINTEK_ENTRY_KEY := enable configuration : 0x87 |
| 27 | * FINTEK_EXIT_KEY := disable configuration : 0xAA |
| 28 | * |
| 29 | * To modify a LDN's configuration register, we use the index port to select |
| 30 | * the index of the LDN and then writing to the data port to alter the |
| 31 | * parameters. A default index, data port pair is 0x4E, 0x4F respectively, a |
| 32 | * user modified pair is 0x2E, 0x2F respectively. |
| 33 | * |
| 34 | */ |
| 35 | |
| 36 | #include <arch/io.h> |
| 37 | #include <device/pnp.h> |
| 38 | #include <stdint.h> |
| 39 | #include "fintek.h" |
| 40 | |
| 41 | #define FINTEK_ENTRY_KEY 0x87 |
| 42 | #define FINTEK_EXIT_KEY 0xAA |
| 43 | |
| 44 | /* Enable configuration: pass entry key '0x87' into index port dev. */ |
Edward O'Callaghan | 85836c2 | 2014-07-09 20:26:25 +1000 | [diff] [blame] | 45 | static void pnp_enter_conf_state(pnp_devfn_t dev) |
Edward O'Callaghan | cf7b498 | 2014-04-23 21:52:25 +1000 | [diff] [blame] | 46 | { |
| 47 | u16 port = dev >> 8; |
| 48 | outb(FINTEK_ENTRY_KEY, port); |
| 49 | outb(FINTEK_ENTRY_KEY, port); |
| 50 | } |
| 51 | |
| 52 | /* Disable configuration: pass exit key '0xAA' into index port dev. */ |
Edward O'Callaghan | 85836c2 | 2014-07-09 20:26:25 +1000 | [diff] [blame] | 53 | static void pnp_exit_conf_state(pnp_devfn_t dev) |
Edward O'Callaghan | cf7b498 | 2014-04-23 21:52:25 +1000 | [diff] [blame] | 54 | { |
| 55 | u16 port = dev >> 8; |
| 56 | outb(FINTEK_EXIT_KEY, port); |
| 57 | } |
| 58 | |
| 59 | /* Bring up early serial debugging output before the RAM is initialized. */ |
Edward O'Callaghan | 85836c2 | 2014-07-09 20:26:25 +1000 | [diff] [blame] | 60 | void fintek_enable_serial(pnp_devfn_t dev, u16 iobase) |
Edward O'Callaghan | cf7b498 | 2014-04-23 21:52:25 +1000 | [diff] [blame] | 61 | { |
| 62 | pnp_enter_conf_state(dev); |
| 63 | pnp_set_logical_device(dev); |
| 64 | pnp_set_enable(dev, 0); |
| 65 | pnp_set_iobase(dev, PNP_IDX_IO0, iobase); |
| 66 | pnp_set_enable(dev, 1); |
| 67 | pnp_exit_conf_state(dev); |
| 68 | } |