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Yinghai Luc65bd562007-02-01 00:10:05 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Luc65bd562007-02-01 00:10:05 +00003 *
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Yinghai Luc65bd562007-02-01 00:10:05 +000016 */
17
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000018#ifndef SOUTHBRIDGE_NVIDIA_MCP55_CHIP_H
19#define SOUTHBRIDGE_NVIDIA_MCP55_CHIP_H
Yinghai Luc65bd562007-02-01 00:10:05 +000020
Uwe Hermanndf323fc2010-11-25 09:03:55 +000021#include <device/device.h>
22
Yinghai Luc65bd562007-02-01 00:10:05 +000023struct southbridge_nvidia_mcp55_config
24{
25 unsigned int ide0_enable : 1;
26 unsigned int ide1_enable : 1;
27 unsigned int sata0_enable : 1;
28 unsigned int sata1_enable : 1;
29 unsigned int mac_eeprom_smbus;
30 unsigned int mac_eeprom_addr;
31};
Yinghai Luc65bd562007-02-01 00:10:05 +000032
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000033#endif