blob: 8914f2a3293a24165e1bcd0a7626db39207d239d [file] [log] [blame]
arch import user (historical)98d0d302005-07-06 17:13:46 +00001/*
Uwe Hermann8af6d552010-10-17 19:13:18 +00002 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
arch import user (historical)98d0d302005-07-06 17:13:46 +000015 */
16
17#include <console/console.h>
18#include <device/device.h>
19#include <device/pci.h>
20#include <device/pci_ids.h>
21#include <device/pci_ops.h>
Kyösti Mälkki413e3da2015-02-03 08:05:55 +020022#include "chip.h"
arch import user (historical)98d0d302005-07-06 17:13:46 +000023
24static void ide_init(struct device *dev)
25{
26 struct southbridge_nvidia_ck804_config *conf;
Uwe Hermann7e2fbd52011-01-04 17:36:55 +000027 u32 dword;
28 u16 word;
29 u8 byte;
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000030
arch import user (historical)98d0d302005-07-06 17:13:46 +000031 conf = dev->chip_info;
32
33 word = pci_read_config16(dev, 0x50);
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000034 /* Ensure prefetch is disabled. */
arch import user (historical)98d0d302005-07-06 17:13:46 +000035 word &= ~((1 << 15) | (1 << 13));
36 if (conf->ide1_enable) {
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000037 /* Enable secondary IDE interface. */
38 word |= (1 << 0);
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000039 printk(BIOS_DEBUG, "IDE1 \t");
arch import user (historical)98d0d302005-07-06 17:13:46 +000040 }
41 if (conf->ide0_enable) {
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000042 /* Enable primary IDE interface. */
43 word |= (1 << 1);
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000044 printk(BIOS_DEBUG, "IDE0\n");
arch import user (historical)98d0d302005-07-06 17:13:46 +000045 }
46
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000047 word |= (1 << 12);
48 word |= (1 << 14);
arch import user (historical)98d0d302005-07-06 17:13:46 +000049
50 pci_write_config16(dev, 0x50, word);
51
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000052 byte = 0x20; /* Latency: 64 --> 32 */
Myles Watson64caf362008-09-18 16:27:00 +000053 pci_write_config8(dev, 0xd, byte);
arch import user (historical)98d0d302005-07-06 17:13:46 +000054
Myles Watson64caf362008-09-18 16:27:00 +000055 dword = pci_read_config32(dev, 0xf8);
56 dword |= 12;
57 pci_write_config32(dev, 0xf8, dword);
arch import user (historical)98d0d302005-07-06 17:13:46 +000058}
59
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000060static struct device_operations ide_ops = {
arch import user (historical)98d0d302005-07-06 17:13:46 +000061 .read_resources = pci_dev_read_resources,
62 .set_resources = pci_dev_set_resources,
63 .enable_resources = pci_dev_enable_resources,
Uwe Hermann7f3d48c2008-10-02 18:19:17 +000064 .init = ide_init,
65 .scan_bus = 0,
Jonathan Kollaschc7f3f802010-10-29 15:56:04 +000066 .ops_pci = &ck804_pci_ops,
arch import user (historical)98d0d302005-07-06 17:13:46 +000067};
68
Stefan Reinauerf1cf1f72007-10-24 09:08:58 +000069static const struct pci_driver ide_driver __pci_driver = {
arch import user (historical)98d0d302005-07-06 17:13:46 +000070 .ops = &ide_ops,
71 .vendor = PCI_VENDOR_ID_NVIDIA,
72 .device = PCI_DEVICE_ID_NVIDIA_CK804_IDE,
73};