| Yinghai Lu | 70093f7 | 2004-07-01 03:55:03 +0000 | [diff] [blame] | 1 | /* for io apic 1461 */ |
| Yinghai Lu | 70093f7 | 2004-07-01 03:55:03 +0000 | [diff] [blame] | 2 | #define MBAR 0x10 |
| 3 | #define ABAR 0x40 |
| 4 | |
| 5 | /* for pci bridge 1460 */ |
| 6 | #define MTT 0x042 |
| 7 | #define HCCR 0x0f0 |
| 8 | #define ACNF 0x0e0 |
| Steven J. Magnani | eb065f0 | 2005-09-14 13:55:41 +0000 | [diff] [blame] | 9 | #define STRP 0x44 // Strap status register |
| 10 | |
| 11 | #define STRP_EN133 0x0001 // 133 MHz-capable (Px_133EN) |
| 12 | #define STRP_HPCAP 0x0002 // Hot-plug capable (Hx_SLOT zero/nonzero) |
| 13 | |
| 14 | #define ACNF_SYNCPH 0x0010 // PCI(-X) input clock is synchronous to hub input clock |