Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 4 | * Copyright (C) 2008-2009 coresystems GmbH |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | c70e9fc | 2010-02-15 23:10:19 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #ifndef SOUTHBRIDGE_INTEL_I82801GX_CHIP_H |
| 17 | #define SOUTHBRIDGE_INTEL_I82801GX_CHIP_H |
| 18 | |
| 19 | struct southbridge_intel_i82801gx_config { |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 20 | /** |
| 21 | * Interrupt Routing configuration |
| 22 | * If bit7 is 1, the interrupt is disabled. |
| 23 | */ |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 24 | uint8_t pirqa_routing; |
| 25 | uint8_t pirqb_routing; |
| 26 | uint8_t pirqc_routing; |
| 27 | uint8_t pirqd_routing; |
| 28 | uint8_t pirqe_routing; |
| 29 | uint8_t pirqf_routing; |
| 30 | uint8_t pirqg_routing; |
| 31 | uint8_t pirqh_routing; |
| 32 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 33 | /** |
| 34 | * GPI Routing configuration |
| 35 | * |
| 36 | * Only the lower two bits have a meaning: |
| 37 | * 00: No effect |
| 38 | * 01: SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 39 | * 10: SCI (if corresponding GPIO_EN bit is also set) |
| 40 | * 11: reserved |
| 41 | */ |
| 42 | uint8_t gpi0_routing; |
| 43 | uint8_t gpi1_routing; |
| 44 | uint8_t gpi2_routing; |
| 45 | uint8_t gpi3_routing; |
| 46 | uint8_t gpi4_routing; |
| 47 | uint8_t gpi5_routing; |
| 48 | uint8_t gpi6_routing; |
| 49 | uint8_t gpi7_routing; |
| 50 | uint8_t gpi8_routing; |
| 51 | uint8_t gpi9_routing; |
| 52 | uint8_t gpi10_routing; |
| 53 | uint8_t gpi11_routing; |
| 54 | uint8_t gpi12_routing; |
| 55 | uint8_t gpi13_routing; |
| 56 | uint8_t gpi14_routing; |
| 57 | uint8_t gpi15_routing; |
| 58 | |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 59 | uint32_t gpe0_en; |
| 60 | uint16_t alt_gp_smi_en; |
| 61 | |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 62 | /* IDE configuration */ |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 63 | uint32_t ide_legacy_combined; |
| 64 | uint32_t ide_enable_primary; |
| 65 | uint32_t ide_enable_secondary; |
| 66 | uint32_t sata_ahci; |
Sven Schnelle | b2f173e | 2011-10-27 13:05:40 +0200 | [diff] [blame] | 67 | uint32_t sata_ports_implemented; |
Sven Schnelle | 906f9ae | 2011-10-23 16:35:01 +0200 | [diff] [blame] | 68 | |
| 69 | int c4onc3_enable:1; |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 70 | int docking_supported:1; |
| 71 | int p_cnt_throttling_supported:1; |
| 72 | int c3_latency; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 73 | }; |
| 74 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 75 | #endif /* SOUTHBRIDGE_INTEL_I82801GX_CHIP_H */ |