blob: 45f05588b759502e39002e1bc6297fe3831b41c7 [file] [log] [blame]
Martin Roth58562402015-10-11 10:36:26 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2014 Sage Electronic Engineering, LLC.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Martin Roth58562402015-10-11 10:36:26 +020015 */
16
17#include <string.h>
18#include <device/device.h>
19#include <device/pci.h>
20#include <arch/acpi.h>
21#include <southbridge/intel/fsp_rangeley/soc.h>
22#include <arch/io.h>
23
24#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
25#include <cpu/x86/smm.h>
26#endif
27
28/**
29 * Fill in the FADT with generic values that can be overridden later.
30 */
31
32typedef struct southbridge_intel_fsp_rangeley_config config_t;
33
34void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
35{
36 acpi_header_t *header = &(fadt->header);
37 struct device *lpcdev = dev_find_slot(SOC_LPC_DEVFN);
38 u16 pmbase = pci_read_config16(lpcdev, ABASE) & 0xfff0;
39 config_t *config = lpcdev->chip_info;
40
41 memset((void *) fadt, 0, sizeof(acpi_fadt_t));
42
43 /*
44 * Reference section 5.2.9 Fixed ACPI Description Table (FADT)
45 * in the ACPI 3.0b specification.
46 */
47
48 /* FADT Header Structure */
49 memcpy(header->signature, "FACP", 4);
50 header->length = sizeof(acpi_fadt_t);
51 header->revision = ACPI_FADT_REV_ACPI_3_0;
52 memcpy(header->oem_id, OEM_ID, 6);
53 memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
54 memcpy(header->asl_compiler_id, ASLC, 4);
55 header->asl_compiler_revision = 1;
56
57 /* ACPI Pointers */
58 fadt->firmware_ctrl = (unsigned long) facs;
59 fadt->dsdt = (unsigned long) dsdt;
60
61 fadt->model = 0; /* reserved, should be 0 ACPI 3.0 */
62 fadt->preferred_pm_profile = config->fadt_pm_profile; /* unknown is default */
63
64 /* System Management */
65 fadt->sci_int = 0x09;
66 fadt->smi_cmd = 0x00; /* disable SMM */
67 fadt->acpi_enable = 0x00; /* unused if SMI_CMD = 0 */
68 fadt->acpi_disable = 0x00; /* unused if SMI_CMD = 0 */
69
70 /* Enable ACPI */
71 outl(inl(pmbase + PM1_CNT) | SCI_EN, pmbase + PM1_CNT);
72
73 /* Power Control */
74 fadt->s4bios_req = 0x00;
75 fadt->pstate_cnt = 0x00;
76
77 /* Control Registers - Base Address */
78 fadt->pm1a_evt_blk = pmbase + PM1_STS;
79 fadt->pm1b_evt_blk = 0x00; /* Not Used */
80 fadt->pm1a_cnt_blk = pmbase + PM1_CNT;
81 fadt->pm1b_cnt_blk = 0x00; /* Not Used */
82 fadt->pm2_cnt_blk = pmbase + PM2A_CNT_BLK;
83 fadt->pm_tmr_blk = pmbase + PM1_TMR;
84 fadt->gpe0_blk = pmbase + GPE0_STS;
85 fadt->gpe1_blk = 0x00; /* Not Used */
86
87 /* Control Registers - Length */
88 fadt->pm1_evt_len = 4; /* 32 bits */
89 fadt->pm1_cnt_len = 2; /* 32 bit register, 16 bits used */
90 fadt->pm2_cnt_len = 1; /* 8 bits */
91 fadt->pm_tmr_len = 4; /* 32 bits */
92 fadt->gpe0_blk_len = 8; /* 64 bits */
93 fadt->gpe1_blk_len = 0;
94 fadt->gpe1_base = 0;
95 fadt->cst_cnt = 0;
96 fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
97 fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
98 fadt->flush_size = 0; /* set to 0 if WBINVD is 1 in flags */
99 fadt->flush_stride = 0; /* set to 0 if WBINVD is 1 in flags */
100 fadt->duty_offset = 1;
101 fadt->duty_width = 0;
102
103 /* RTC Registers */
104 fadt->day_alrm = 0x0D;
105 fadt->mon_alrm = 0x00;
106 fadt->century = 0x00;
107 fadt->iapc_boot_arch = config->fadt_boot_arch; /* legacy free default */
108
109 fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
110 ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
111 ACPI_FADT_RESET_REGISTER | ACPI_FADT_SLEEP_TYPE |
112 ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
113
114 /* Reset Register */
115 fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
116 fadt->reset_reg.bit_width = 8;
117 fadt->reset_reg.bit_offset = 0;
118 fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
119 fadt->reset_reg.addrl = 0xCF9;
120 fadt->reset_reg.addrh = 0x00;
121 fadt->reset_value = 6;
122
123 /* Reserved Bits */
124 fadt->res3 = 0x00; /* reserved, MUST be 0 ACPI 3.0 */
125 fadt->res4 = 0x00; /* reserved, MUST be 0 ACPI 3.0 */
126 fadt->res5 = 0x00; /* reserved, MUST be 0 ACPI 3.0 */
127
128 /* Extended ACPI Pointers */
129 fadt->x_firmware_ctl_l = (unsigned long)facs;
130 fadt->x_firmware_ctl_h = 0x00;
131 fadt->x_dsdt_l = (unsigned long)dsdt;
132 fadt->x_dsdt_h = 0x00;
133
134 /* PM1 Status & PM1 Enable */
135 fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
136 fadt->x_pm1a_evt_blk.bit_width = 32;
137 fadt->x_pm1a_evt_blk.bit_offset = 0;
138 fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
139 fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
140 fadt->x_pm1a_evt_blk.addrh = 0x00;
141
142 fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
143 fadt->x_pm1b_evt_blk.bit_width = 0;
144 fadt->x_pm1b_evt_blk.bit_offset = 0;
145 fadt->x_pm1b_evt_blk.access_size = 0;
146 fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk;
147 fadt->x_pm1b_evt_blk.addrh = 0x00;
148
149 /* PM1 Control Registers */
150 fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
151 fadt->x_pm1a_cnt_blk.bit_width = 16;
152 fadt->x_pm1a_cnt_blk.bit_offset = 0;
153 fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
154 fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
155 fadt->x_pm1a_cnt_blk.addrh = 0x00;
156
157 fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
158 fadt->x_pm1b_cnt_blk.bit_width = 0;
159 fadt->x_pm1b_cnt_blk.bit_offset = 0;
160 fadt->x_pm1b_cnt_blk.access_size = 0;
161 fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk;
162 fadt->x_pm1b_cnt_blk.addrh = 0x00;
163
164 /* PM2 Control Registers */
165 fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
166 fadt->x_pm2_cnt_blk.bit_width = 8;
167 fadt->x_pm2_cnt_blk.bit_offset = 0;
168 fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
169 fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
170 fadt->x_pm2_cnt_blk.addrh = 0x00;
171
172 /* PM1 Timer Register */
173 fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
174 fadt->x_pm_tmr_blk.bit_width = 32;
175 fadt->x_pm_tmr_blk.bit_offset = 0;
176 fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
177 fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
178 fadt->x_pm_tmr_blk.addrh = 0x00;
179
180 /* General-Purpose Event Registers */
181 fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO;
182 fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + EventEnable */
183 fadt->x_gpe0_blk.bit_offset = 0;
184 fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
185 fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
186 fadt->x_gpe0_blk.addrh = 0x00;
187
188 fadt->x_gpe1_blk.space_id = ACPI_ADDRESS_SPACE_IO;
189 fadt->x_gpe1_blk.bit_width = 0;
190 fadt->x_gpe1_blk.bit_offset = 0;
191 fadt->x_gpe1_blk.access_size = 0;
192 fadt->x_gpe1_blk.addrl = fadt->gpe1_blk;
193 fadt->x_gpe1_blk.addrh = 0x00;
194
195 header->checksum =
196 acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
197}