| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| Timothy Pearson | 83abd81 | 2015-06-08 19:35:06 -0500 | [diff] [blame] | 5 | * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #ifndef SB800_H |
| 18 | #define SB800_H |
| 19 | |
| 20 | #include <device/pci_ids.h> |
| 21 | #include "chip.h" |
| 22 | |
| 23 | /* Power management index/data registers */ |
| Zheng Bao | a4da254 | 2011-01-20 05:59:22 +0000 | [diff] [blame] | 24 | #define BIOSRAM_INDEX 0xcd4 |
| 25 | #define BIOSRAM_DATA 0xcd5 |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 26 | #define PM_INDEX 0xcd6 |
| 27 | #define PM_DATA 0xcd7 |
| 28 | #define PM2_INDEX 0xcd0 |
| 29 | #define PM2_DATA 0xcd1 |
| 30 | |
| 31 | #define SB800_ACPI_IO_BASE 0x800 |
| 32 | |
| 33 | #define ACPI_PM_EVT_BLK (SB800_ACPI_IO_BASE + 0x00) /* 4 bytes */ |
| 34 | #define ACPI_PM1_CNT_BLK (SB800_ACPI_IO_BASE + 0x04) /* 2 bytes */ |
| Timothy Pearson | 83abd81 | 2015-06-08 19:35:06 -0500 | [diff] [blame] | 35 | #define ACPI_PMA_CNT_BLK (SB800_ACPI_IO_BASE + 0x17) /* 1 byte */ |
| 36 | #define ACPI_PM_TMR_BLK (SB800_ACPI_IO_BASE + 0x20) /* 4 bytes */ |
| 37 | #define ACPI_GPE0_BLK (SB800_ACPI_IO_BASE + 0x18) /* 8 bytes */ |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 38 | #define ACPI_CPU_CONTROL (SB800_ACPI_IO_BASE + 0x08) /* 6 bytes */ |
| Timothy Pearson | 83abd81 | 2015-06-08 19:35:06 -0500 | [diff] [blame] | 39 | #define ACPI_CPU_P_LVL2 (ACPI_CPU_CONTROL + 0x4) /* 1 byte */ |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 40 | |
| Stefan Reinauer | 1c2734f | 2011-01-28 01:06:39 +0000 | [diff] [blame] | 41 | void pm_iowrite(u8 reg, u8 value); |
| 42 | u8 pm_ioread(u8 reg); |
| 43 | void pm2_iowrite(u8 reg, u8 value); |
| 44 | u8 pm2_ioread(u8 reg); |
| 45 | void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val); |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 46 | |
| 47 | #define REV_SB800_A11 0x11 |
| 48 | #define REV_SB800_A12 0x12 |
| 49 | |
| Zheng Bao | a4da254 | 2011-01-20 05:59:22 +0000 | [diff] [blame] | 50 | |
| Zheng Bao | 79c04d5 | 2011-01-20 05:41:11 +0000 | [diff] [blame] | 51 | #ifdef __PRE_RAM__ |
| 52 | void sb800_lpc_port80(void); |
| 53 | void sb800_pci_port80(void); |
| 54 | void sb800_clk_output_48Mhz(void); |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 55 | |
| Zheng Bao | a4da254 | 2011-01-20 05:59:22 +0000 | [diff] [blame] | 56 | int s3_save_nvram_early(u32 dword, int size, int nvram_pos); |
| 57 | int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); |
| 58 | |
| Stefan Reinauer | 1c2734f | 2011-01-28 01:06:39 +0000 | [diff] [blame] | 59 | #else |
| 60 | void sb800_enable(device_t dev); |
| Stefan Reinauer | 1c2734f | 2011-01-28 01:06:39 +0000 | [diff] [blame] | 61 | #endif |
| Zheng Bao | d098575 | 2011-01-20 04:45:48 +0000 | [diff] [blame] | 62 | |
| 63 | #endif /* SB800_H */ |