blob: 5c1111adc420a7baa39f046f7785613bceada6be [file] [log] [blame]
Michael Xie7586cef2008-09-22 13:11:39 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Michael Xie7586cef2008-09-22 13:11:39 +000014 */
15
16#ifndef SB600_H
17#define SB600_H
18
Martin Roth1e1c7ac2015-12-10 08:19:27 -070019#ifndef __ACPI__
Uwe Hermannb7d781d2008-10-13 21:41:24 +000020#include <device/pci_ids.h>
Marc Jonescf762a42008-10-03 23:23:20 +000021#include "chip.h"
Martin Roth1e1c7ac2015-12-10 08:19:27 -070022#endif
Marc Jonescf762a42008-10-03 23:23:20 +000023
Uwe Hermann039255c2008-10-21 16:27:38 +000024/* Power management index/data registers */
25#define PM_INDEX 0xcd6
26#define PM_DATA 0xcd7
27#define PM2_INDEX 0xcd0
28#define PM2_DATA 0xcd1
29
Martin Roth1e1c7ac2015-12-10 08:19:27 -070030#define HPET_BASE_ADDRESS 0xfed00000
31
32#ifndef __ACPI__
Michael Xie7586cef2008-09-22 13:11:39 +000033extern void pm_iowrite(u8 reg, u8 value);
34extern u8 pm_ioread(u8 reg);
35extern void pm2_iowrite(u8 reg, u8 value);
36extern u8 pm2_ioread(u8 reg);
37extern void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val);
38
39void sb600_enable(device_t dev);
40
Stefan Reinauerc8873ce2010-04-30 19:21:01 +000041void sb600_lpc_port80(void);
42void sb600_pci_port80(void);
43
Martin Roth1e1c7ac2015-12-10 08:19:27 -070044#endif /* __ACPI__ */
Michael Xie7586cef2008-09-22 13:11:39 +000045#endif /* SB600_H */