Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2013 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | |
Julius Werner | 80af442 | 2014-10-20 13:18:56 -0700 | [diff] [blame] | 17 | #include <arch/cache.h> |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 18 | #include <assert.h> |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 19 | #include <boot_device.h> |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 20 | #include <cbfs.h> /* This driver serves as a CBFS media source. */ |
Julius Werner | 80af442 | 2014-10-20 13:18:56 -0700 | [diff] [blame] | 21 | #include <console/console.h> |
| 22 | #include <soc/alternate_cbfs.h> |
| 23 | #include <soc/power.h> |
| 24 | #include <soc/spi.h> |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 25 | #include <stdlib.h> |
| 26 | #include <string.h> |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 27 | #include <symbols.h> |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 28 | |
| 29 | /* This allows USB A-A firmware upload from a compatible host in four parts: |
| 30 | * The first two are the bare BL1 and the Coreboot boot block, which are just |
| 31 | * written to their respective loading addresses. These transfers are initiated |
| 32 | * by the IROM / BL1, so this code has nothing to do with them. |
| 33 | * |
| 34 | * The third transfer is a valid CBFS image that contains only the romstage, |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 35 | * and must be small enough to fit into the PRE_RAM CBFS cache in |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 36 | * IRAM. It is loaded when this function gets called in the boot block, and |
| 37 | * the normal CBFS code extracts the romstage from it. |
| 38 | * |
| 39 | * The fourth transfer is also a CBFS image, but can be of arbitrary size and |
| 40 | * should contain all available stages/payloads/etc. It is loaded when this |
| 41 | * function is called a second time at the end of the romstage, and copied to |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 42 | * the romstage/ramstage CBFS cache in DRAM. It will reside there for the |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 43 | * rest of the firmware's lifetime and all subsequent stages (which will not |
| 44 | * have __PRE_RAM__ defined) can just directly reference it there. |
| 45 | */ |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 46 | static int usb_cbfs_open(void) |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 47 | { |
| 48 | #ifdef __PRE_RAM__ |
| 49 | static int first_run = 1; |
| 50 | int (*irom_load_usb)(void) = *irom_load_image_from_usb_ptr; |
| 51 | |
| 52 | if (!first_run) |
| 53 | return 0; |
| 54 | |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 55 | dcache_mmu_disable(); |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 56 | if (!irom_load_usb()) { |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 57 | dcache_mmu_enable(); |
| 58 | printk(BIOS_EMERG, "Unable to load CBFS image via USB!\n"); |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 59 | return -1; |
| 60 | } |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 61 | dcache_mmu_enable(); |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 62 | |
| 63 | /* |
| 64 | * We need to trust the host/irom to copy the image to our |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 65 | * _cbfs_cache address... there is no way to control or even |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 66 | * check the transfer size or target address from our side. |
| 67 | */ |
| 68 | |
| 69 | printk(BIOS_DEBUG, "USB A-A transfer successful, CBFS image should now" |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 70 | " be at %p\n", _cbfs_cache); |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 71 | first_run = 0; |
| 72 | #endif |
| 73 | return 0; |
| 74 | } |
| 75 | |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 76 | /* |
| 77 | * SDMMC works very similar to USB A-A: we copy the CBFS image into memory |
| 78 | * and read it from there. While SDMMC would also allow direct block by block |
| 79 | * on-demand reading, we might run into problems if we call back into the IROM |
| 80 | * in very late boot stages (e.g. after initializing/changing MMC clocks)... so |
| 81 | * this seems like a safer approach. It also makes it easy to pass our image |
| 82 | * down to payloads. |
| 83 | */ |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 84 | static int sdmmc_cbfs_open(void) |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 85 | { |
| 86 | #ifdef __PRE_RAM__ |
| 87 | /* |
| 88 | * In the bootblock, we just copy the small part that fits in the buffer |
| 89 | * and hope that it's enough (since the romstage is currently always the |
| 90 | * first component in the image, this should work out). In the romstage, |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 91 | * we copy until our cache is full (currently 12M) to avoid the pain of |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 92 | * figuring out the true image size from in here. Since this is mainly a |
| 93 | * developer/debug boot mode, those shortcomings should be bearable. |
| 94 | */ |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 95 | const u32 count = _cbfs_cache_size / 512; |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 96 | static int first_run = 1; |
| 97 | int (*irom_load_sdmmc)(u32 start, u32 count, void *dst) = |
| 98 | *irom_sdmmc_read_blocks_ptr; |
| 99 | |
| 100 | if (!first_run) |
| 101 | return 0; |
| 102 | |
| 103 | dcache_mmu_disable(); |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 104 | if (!irom_load_sdmmc(1, count, _cbfs_cache)) { |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 105 | dcache_mmu_enable(); |
| 106 | printk(BIOS_EMERG, "Unable to load CBFS image from SDMMC!\n"); |
| 107 | return -1; |
| 108 | } |
| 109 | dcache_mmu_enable(); |
| 110 | |
| 111 | printk(BIOS_DEBUG, "SDMMC read successful, CBFS image should now be" |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 112 | " at %p\n", _cbfs_cache); |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 113 | first_run = 0; |
| 114 | #endif |
| 115 | return 0; |
| 116 | } |
| 117 | |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 118 | static struct mem_region_device alternate_rdev = MEM_REGION_DEV_INIT(NULL, 0); |
| 119 | |
| 120 | const struct region_device *boot_device_ro(void) |
| 121 | { |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 122 | if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 123 | return &alternate_rdev.rdev; |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 124 | |
Julius Werner | fa938c7 | 2013-08-29 14:17:36 -0700 | [diff] [blame] | 125 | switch (exynos_power->om_stat & OM_STAT_MASK) { |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 126 | case OM_STAT_SDMMC: |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 127 | return &alternate_rdev.rdev; |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 128 | case OM_STAT_SPI: |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 129 | return exynos_spi_boot_device(); |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 130 | default: |
| 131 | printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", |
Julius Werner | fa938c7 | 2013-08-29 14:17:36 -0700 | [diff] [blame] | 132 | exynos_power->om_stat); |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 133 | return NULL; |
| 134 | } |
| 135 | } |
| 136 | |
| 137 | void boot_device_init(void) |
| 138 | { |
| 139 | mem_region_device_init(&alternate_rdev, _cbfs_cache, _cbfs_cache_size); |
| 140 | |
| 141 | if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) { |
| 142 | printk(BIOS_DEBUG, "Using Exynos alternate boot mode USB A-A\n"); |
| 143 | usb_cbfs_open(); |
| 144 | return; |
| 145 | } |
| 146 | |
| 147 | switch (exynos_power->om_stat & OM_STAT_MASK) { |
| 148 | case OM_STAT_SDMMC: |
| 149 | printk(BIOS_DEBUG, "Using Exynos alternate boot mode SDMMC\n"); |
| 150 | sdmmc_cbfs_open(); |
| 151 | break; |
| 152 | case OM_STAT_SPI: |
| 153 | exynos_init_spi_boot_device(); |
| 154 | break; |
| 155 | default: |
| 156 | printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", |
| 157 | exynos_power->om_stat); |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 158 | } |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 159 | } |