Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| 3 | * Copyright 2014 Google Inc. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <arch/cache.h> |
| 16 | #include <console/console.h> |
| 17 | #include <soc/addressmap.h> |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 18 | #include <soc/pmc.h> |
| 19 | #include <soc/sdram.h> |
| 20 | #include <stdlib.h> |
| 21 | |
| 22 | /* |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 23 | * This function reads SDRAM parameters from the common BCT format and |
| 24 | * writes them into PMC scratch registers (where the BootROM expects them |
| 25 | * on LP0 resume). |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 26 | */ |
| 27 | void sdram_lp0_save_params(const struct sdram_params *sdram) |
| 28 | { |
| 29 | struct tegra_pmc_regs * pmc = (void *)TEGRA_PMC_BASE; |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 30 | |
| 31 | #define pack(src, src_bits, dst, dst_bits) { \ |
| 32 | _Static_assert((1 ? src_bits) >= (0 ? src_bits) && (1 ? dst_bits) >= \ |
| 33 | (0 ? dst_bits), "byte range flipped (must be MSB:LSB)" ); \ |
| 34 | _Static_assert((1 ? src_bits) - (0 ? src_bits) == (1 ? dst_bits) - \ |
| 35 | (0 ? dst_bits), "src and dst byte range lengths differ" ); \ |
| 36 | u32 mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \ |
| 37 | dst &= ~(mask << (0 ? dst_bits)); \ |
| 38 | dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \ |
| 39 | } |
| 40 | |
| 41 | #define s(param, src_bits, pmcreg, dst_bits) \ |
| 42 | pack(sdram->param, src_bits, pmc->pmcreg, dst_bits) |
| 43 | |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 44 | #define c(value, pmcreg, dst_bits) \ |
| 45 | pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits) |
| 46 | |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 47 | /* 32 bits version of s macro */ |
| 48 | #define s32(param, pmcreg) pmc->pmcreg = sdram->param |
| 49 | |
| 50 | /* 32 bits version c macro */ |
| 51 | #define c32(value, pmcreg) pmc->pmcreg = value |
| 52 | |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 53 | s(EmcClockSource, 7:0, scratch6, 15:8); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 54 | s(EmcClockSourceDll, 7:0, scratch6, 23:16); |
| 55 | s(EmcClockSource, 31:29, scratch6, 26:24); |
| 56 | s(EmcClockSourceDll, 31:29, scratch6, 29:27); |
| 57 | s(EmcClockSourceDll, 11:10, scratch6, 31:30); |
| 58 | s(ClkRstControllerPllmMisc2Override, 9:8, scratch7, 1:0); |
| 59 | s(ClkRstControllerPllmMisc2Override, 2:1, scratch7, 3:2); |
| 60 | s(EmcZqCalLpDdr4WarmBoot, 31:30, scratch7, 5:4); |
| 61 | s(EmcClockSource, 15:15, scratch7, 6:6); |
| 62 | s(EmcClockSource, 26:26, scratch7, 7:7); |
| 63 | s(EmcClockSource, 20:20, scratch7, 8:8); |
| 64 | s(EmcClockSource, 19:19, scratch7, 9:9); |
| 65 | s(ClkRstControllerPllmMisc2Override, 13:13, scratch7, 10:10); |
| 66 | s(ClkRstControllerPllmMisc2Override, 12:12, scratch7, 11:11); |
| 67 | s(ClkRstControllerPllmMisc2Override, 11:11, scratch7, 12:12); |
| 68 | s(ClkRstControllerPllmMisc2Override, 10:10, scratch7, 13:13); |
| 69 | s(ClkRstControllerPllmMisc2Override, 5:5, scratch7, 14:14); |
| 70 | s(ClkRstControllerPllmMisc2Override, 4:4, scratch7, 15:15); |
| 71 | s(ClkRstControllerPllmMisc2Override, 3:3, scratch7, 16:16); |
| 72 | s(ClkRstControllerPllmMisc2Override, 0:0, scratch7, 17:17); |
| 73 | s(EmcZqCalLpDdr4WarmBoot, 1:0, scratch7, 19:18); |
| 74 | s(EmcZqCalLpDdr4WarmBoot, 4:4, scratch7, 20:20); |
| 75 | s(EmcOdtWrite, 5:0, scratch7, 26:21); |
| 76 | s(EmcOdtWrite, 11:8, scratch7, 30:27); |
| 77 | s(EmcOdtWrite, 31:31, scratch7, 31:31); |
| 78 | s(EmcFdpdCtrlCmdNoRamp, 0:0, scratch13, 30:30); |
| 79 | s(EmcCfgPipeClk, 0:0, scratch13, 31:31); |
| 80 | s(McEmemArbMisc2, 0:0, scratch14, 30:30); |
| 81 | s(McDaCfg0, 0:0, scratch14, 31:31); |
| 82 | s(EmcQRst, 6:0, scratch15, 26:20); |
| 83 | s(EmcQRst, 20:16, scratch15, 31:27); |
| 84 | s(EmcPmacroCmdTxDrv, 5:0, scratch16, 25:20); |
| 85 | s(EmcPmacroCmdTxDrv, 13:8, scratch16, 31:26); |
| 86 | s(EmcPmacroAutocalCfg0, 2:0, scratch17, 22:20); |
| 87 | s(EmcPmacroAutocalCfg0, 10:8, scratch17, 25:23); |
| 88 | s(EmcPmacroAutocalCfg0, 18:16, scratch17, 28:26); |
| 89 | s(EmcPmacroAutocalCfg0, 26:24, scratch17, 31:29); |
| 90 | s(EmcPmacroAutocalCfg1, 2:0, scratch18, 22:20); |
| 91 | s(EmcPmacroAutocalCfg1, 10:8, scratch18, 25:23); |
| 92 | s(EmcPmacroAutocalCfg1, 18:16, scratch18, 28:26); |
| 93 | s(EmcPmacroAutocalCfg1, 26:24, scratch18, 31:29); |
| 94 | s(EmcPmacroAutocalCfg2, 2:0, scratch19, 22:20); |
| 95 | s(EmcPmacroAutocalCfg2, 10:8, scratch19, 25:23); |
| 96 | s(EmcPmacroAutocalCfg2, 18:16, scratch19, 28:26); |
| 97 | s(EmcPmacroAutocalCfg2, 26:24, scratch19, 31:29); |
| 98 | s32(EmcCfgRsv,scratch22); |
| 99 | s32(EmcAutoCalConfig, scratch23); |
| 100 | s32(EmcAutoCalVrefSel0, scratch24); |
| 101 | s32(EmcPmacroBrickCtrlRfu1, scratch25); |
| 102 | s32(EmcPmacroBrickCtrlRfu2, scratch26); |
| 103 | s32(EmcPmcScratch1, scratch27); |
| 104 | s32(EmcPmcScratch2, scratch28); |
| 105 | s32(EmcPmcScratch3, scratch29); |
| 106 | s32(McEmemArbDaTurns, scratch30); |
| 107 | s(EmcFbioSpare, 31:24, scratch58, 7:0); |
| 108 | s(EmcFbioSpare, 23:16, scratch58, 15:8); |
| 109 | s(EmcFbioSpare, 15:8, scratch58, 23:16); |
| 110 | s(EmcFbioSpare, 7:2, scratch58, 29:24); |
| 111 | s(EmcFbioSpare, 0:0, scratch58, 30:30); |
| 112 | s(EmcDllCfg0, 29:0, scratch59, 29:0); |
| 113 | s(EmcPmacroDdllBypass, 11:0, scratch60, 11:0); |
| 114 | s(EmcPmacroDdllBypass, 27:13, scratch60, 26:12); |
| 115 | s(EmcPmacroDdllBypass, 31:29, scratch60, 29:27); |
| 116 | s(McEmemArbMisc0, 14:0, scratch61, 14:0); |
| 117 | s(McEmemArbMisc0, 30:16, scratch61, 29:15); |
| 118 | s(EmcFdpdCtrlCmd, 16:0, scratch62, 16:0); |
| 119 | s(EmcFdpdCtrlCmd, 31:20, scratch62, 28:17); |
| 120 | s(EmcAutoCalConfig2, 27:0, scratch63, 27:0); |
| 121 | s(EmcBurstRefreshNum, 3:0, scratch63, 31:28); |
| 122 | s(EmcPmacroZctrl, 27:0, scratch64, 27:0); |
| 123 | s(EmcTppd, 3:0, scratch64, 31:28); |
| 124 | s(EmcCfgDigDll, 10:0, scratch65, 10:0); |
| 125 | s(EmcCfgDigDll, 25:12, scratch65, 24:11); |
| 126 | s(EmcCfgDigDll, 27:27, scratch65, 25:25); |
| 127 | s(EmcCfgDigDll, 31:30, scratch65, 27:26); |
| 128 | s(EmcR2r, 3:0, scratch65, 31:28); |
| 129 | s(EmcFdpdCtrlDq, 16:0, scratch66, 16:0); |
| 130 | s(EmcFdpdCtrlDq, 28:20, scratch66, 25:17); |
| 131 | s(EmcFdpdCtrlDq, 31:30, scratch66, 27:26); |
| 132 | s(EmcW2w, 3:0, scratch66, 31:28); |
| 133 | s(EmcPmacroTxPwrd4, 13:0, scratch67, 13:0); |
| 134 | s(EmcPmacroTxPwrd4, 29:16, scratch67, 27:14); |
| 135 | s(EmcPmacroCommonPadTxCtrl, 3:0, scratch67, 31:28); |
| 136 | s(EmcPmacroTxPwrd5, 13:0, scratch68, 13:0); |
| 137 | s(EmcPmacroTxPwrd5, 29:16, scratch68, 27:14); |
| 138 | s(EmcPmacroDdllPwrd0, 4:0, scratch69, 4:0); |
| 139 | s(EmcPmacroDdllPwrd0, 12:6, scratch69, 11:5); |
| 140 | s(EmcPmacroDdllPwrd0, 20:14, scratch69, 18:12); |
| 141 | s(EmcPmacroDdllPwrd0, 28:22, scratch69, 25:19); |
| 142 | s(EmcPmacroDdllPwrd0, 31:30, scratch69, 27:26); |
| 143 | s(EmcCfg, 4:4, scratch69, 31:31); |
| 144 | s(EmcPmacroDdllPwrd1, 4:0, scratch70, 4:0); |
| 145 | s(EmcPmacroDdllPwrd1, 12:6, scratch70, 11:5); |
| 146 | s(EmcPmacroDdllPwrd1, 20:14, scratch70, 18:12); |
| 147 | s(EmcPmacroDdllPwrd1, 28:22, scratch70, 25:19); |
| 148 | s(EmcPmacroDdllPwrd1, 31:30, scratch70, 27:26); |
| 149 | s(EmcCfg, 5:5, scratch70, 31:31); |
| 150 | s(EmcPmacroDdllPwrd2, 4:0, scratch71, 4:0); |
| 151 | s(EmcPmacroDdllPwrd2, 12:6, scratch71, 11:5); |
| 152 | s(EmcPmacroDdllPwrd2, 20:14, scratch71, 18:12); |
| 153 | s(EmcPmacroDdllPwrd2, 28:22, scratch71, 25:19); |
| 154 | s(EmcPmacroDdllPwrd2, 31:30, scratch71, 27:26); |
| 155 | s(EmcFbioCfg5, 23:20, scratch71, 31:28); |
| 156 | s(EmcPmacroIbVrefDq_0, 6:0, scratch72, 6:0); |
| 157 | s(EmcPmacroIbVrefDq_0, 14:8, scratch72, 13:7); |
| 158 | s(EmcPmacroIbVrefDq_0, 22:16, scratch72, 20:14); |
| 159 | s(EmcPmacroIbVrefDq_0, 30:24, scratch72, 27:21); |
| 160 | s(EmcFbioCfg5, 15:13, scratch72, 30:28); |
| 161 | s(EmcCfg, 6:6, scratch72, 31:31); |
| 162 | s(EmcPmacroIbVrefDq_1, 6:0, scratch73, 6:0); |
| 163 | s(EmcPmacroIbVrefDq_1, 14:8, scratch73, 13:7); |
| 164 | s(EmcPmacroIbVrefDq_1, 22:16, scratch73, 20:14); |
| 165 | s(EmcPmacroIbVrefDq_1, 30:24, scratch73, 27:21); |
| 166 | s(EmcCfg2, 5:3, scratch73, 30:28); |
| 167 | s(EmcCfg, 7:7, scratch73, 31:31); |
| 168 | s(EmcPmacroIbVrefDqs_0, 6:0, scratch74, 6:0); |
| 169 | s(EmcPmacroIbVrefDqs_0, 14:8, scratch74, 13:7); |
| 170 | s(EmcPmacroIbVrefDqs_0, 22:16, scratch74, 20:14); |
| 171 | s(EmcPmacroIbVrefDqs_0, 30:24, scratch74, 27:21); |
| 172 | s(EmcCfg, 17:16, scratch74, 29:28); |
| 173 | s(EmcFbioCfg5, 1:0, scratch74, 31:30); |
| 174 | s(EmcPmacroIbVrefDqs_1, 6:0, scratch75, 6:0); |
| 175 | s(EmcPmacroIbVrefDqs_1, 14:8, scratch75, 13:7); |
| 176 | s(EmcPmacroIbVrefDqs_1, 22:16, scratch75, 20:14); |
| 177 | s(EmcPmacroIbVrefDqs_1, 30:24, scratch75, 27:21); |
| 178 | s(EmcFbioCfg5, 3:2, scratch75, 29:28); |
| 179 | s(EmcCfg2, 27:26, scratch75, 31:30); |
| 180 | s(EmcPmacroDdllShortCmd_0, 6:0, scratch76, 6:0); |
| 181 | s(EmcPmacroDdllShortCmd_0, 14:8, scratch76, 13:7); |
| 182 | s(EmcPmacroDdllShortCmd_0, 22:16, scratch76, 20:14); |
| 183 | s(EmcPmacroDdllShortCmd_0, 30:24, scratch76, 27:21); |
| 184 | s(EmcPmacroCmdPadTxCtrl, 3:2, scratch76, 29:28); |
| 185 | s(EmcPmacroCmdPadTxCtrl, 7:6, scratch76, 31:30); |
| 186 | s(EmcPmacroDdllShortCmd_1, 6:0, scratch77, 6:0); |
| 187 | s(EmcPmacroDdllShortCmd_1, 14:8, scratch77, 13:7); |
| 188 | s(EmcPmacroDdllShortCmd_1, 22:16, scratch77, 20:14); |
| 189 | s(EmcPmacroDdllShortCmd_1, 30:24, scratch77, 27:21); |
| 190 | s(EmcPmacroCmdPadTxCtrl, 11:10, scratch77, 29:28); |
| 191 | s(EmcPmacroCmdPadTxCtrl, 15:14, scratch77, 31:30); |
| 192 | s(EmcAutoCalChannel, 5:0, scratch78, 5:0); |
| 193 | s(EmcAutoCalChannel, 11:8, scratch78, 9:6); |
| 194 | s(EmcAutoCalChannel, 27:16, scratch78, 21:10); |
| 195 | s(EmcAutoCalChannel, 31:29, scratch78, 24:22); |
| 196 | s(EmcConfigSampleDelay, 6:0, scratch78, 31:25); |
| 197 | s(EmcPmacroRxTerm, 5:0, scratch79, 5:0); |
| 198 | s(EmcPmacroRxTerm, 13:8, scratch79, 11:6); |
| 199 | s(EmcPmacroRxTerm, 21:16, scratch79, 17:12); |
| 200 | s(EmcPmacroRxTerm, 29:24, scratch79, 23:18); |
| 201 | s(EmcRc, 7:0, scratch79, 31:24); |
| 202 | s(EmcPmacroDqTxDrv, 5:0, scratch80, 5:0); |
| 203 | s(EmcPmacroDqTxDrv, 13:8, scratch80, 11:6); |
| 204 | s(EmcPmacroDqTxDrv, 21:16, scratch80, 17:12); |
| 205 | s(EmcPmacroDqTxDrv, 29:24, scratch80, 23:18); |
| 206 | s(EmcSelDpdCtrl, 5:2, scratch80, 27:24); |
| 207 | s(EmcSelDpdCtrl, 8:8, scratch80, 28:28); |
| 208 | s(EmcSelDpdCtrl, 18:16, scratch80, 31:29); |
| 209 | s(EmcPmacroCaTxDrv, 5:0, scratch81, 5:0); |
| 210 | s(EmcPmacroCaTxDrv, 13:8, scratch81, 11:6); |
| 211 | s(EmcPmacroCaTxDrv, 21:16, scratch81, 17:12); |
| 212 | s(EmcPmacroCaTxDrv, 29:24, scratch81, 23:18); |
| 213 | s(EmcObdly, 5:0, scratch81, 29:24); |
| 214 | s(EmcObdly, 29:28, scratch81, 31:30); |
| 215 | s(EmcZcalInterval, 23:10, scratch82, 13:0); |
| 216 | s(EmcZcalInterval, 9:0, scratch82, 23:14); |
| 217 | s(EmcPmacroCmdRxTermMode, 1:0, scratch82, 25:24); |
| 218 | s(EmcPmacroCmdRxTermMode, 5:4, scratch82, 27:26); |
| 219 | s(EmcPmacroCmdRxTermMode, 9:8, scratch82, 29:28); |
| 220 | s(EmcPmacroCmdRxTermMode, 13:12, scratch82, 31:30); |
| 221 | s(EmcDataBrlshft0, 23:0, scratch83, 23:0); |
| 222 | s(EmcPmacroDataRxTermMode, 1:0, scratch83, 25:24); |
| 223 | s(EmcPmacroDataRxTermMode, 5:4, scratch83, 27:26); |
| 224 | s(EmcPmacroDataRxTermMode, 9:8, scratch83, 29:28); |
| 225 | s(EmcPmacroDataRxTermMode, 13:12, scratch83, 31:30); |
| 226 | s(EmcDataBrlshft1, 23:0, scratch84, 23:0); |
| 227 | s(McEmemArbTimingRc, 7:0, scratch84, 31:24); |
| 228 | s(EmcDqsBrlshft0, 23:0, scratch85, 23:0); |
| 229 | s(McEmemArbRsv, 7:0, scratch85, 31:24); |
| 230 | s(EmcDqsBrlshft1, 23:0, scratch86, 23:0); |
| 231 | s(EmcCfgPipe2, 11:0, scratch87, 11:0); |
| 232 | s(EmcCfgPipe2, 27:16, scratch87, 23:12); |
| 233 | s(EmcCfgPipe1, 11:0, scratch88, 11:0); |
| 234 | s(EmcCfgPipe1, 27:16, scratch88, 23:12); |
| 235 | s(EmcPmacroCmdCtrl0, 5:0, scratch89, 5:0); |
| 236 | s(EmcPmacroCmdCtrl0, 13:8, scratch89, 11:6); |
| 237 | s(EmcPmacroCmdCtrl0, 21:16, scratch89, 17:12); |
| 238 | s(EmcPmacroCmdCtrl0, 29:24, scratch89, 23:18); |
| 239 | s(EmcPmacroCmdCtrl1, 5:0, scratch90, 5:0); |
| 240 | s(EmcPmacroCmdCtrl1, 13:8, scratch90, 11:6); |
| 241 | s(EmcPmacroCmdCtrl1, 21:16, scratch90, 17:12); |
| 242 | s(EmcPmacroCmdCtrl1, 29:24, scratch90, 23:18); |
| 243 | s(EmcRas, 6:0, scratch90, 30:24); |
| 244 | s(EmcCfg, 8:8, scratch90, 31:31); |
| 245 | s(EmcPmacroVttgenCtrl2, 23:0, scratch91, 23:0); |
| 246 | s(EmcW2p, 6:0, scratch91, 30:24); |
| 247 | s(EmcCfg, 9:9, scratch91, 31:31); |
| 248 | s(EmcPmacroCmdPadRxCtrl, 2:0, scratch92, 2:0); |
| 249 | s(EmcPmacroCmdPadRxCtrl, 5:4, scratch92, 4:3); |
| 250 | s(EmcPmacroCmdPadRxCtrl, 10:8, scratch92, 7:5); |
| 251 | s(EmcPmacroCmdPadRxCtrl, 22:12, scratch92, 18:8); |
| 252 | s(EmcPmacroCmdPadRxCtrl, 28:24, scratch92, 23:19); |
| 253 | s(EmcQSafe, 6:0, scratch92, 30:24); |
| 254 | s(EmcCfg, 18:18, scratch92, 31:31); |
| 255 | s(EmcPmacroDataPadRxCtrl, 2:0, scratch93, 2:0); |
| 256 | s(EmcPmacroDataPadRxCtrl, 5:4, scratch93, 4:3); |
| 257 | s(EmcPmacroDataPadRxCtrl, 10:8, scratch93, 7:5); |
| 258 | s(EmcPmacroDataPadRxCtrl, 22:12, scratch93, 18:8); |
| 259 | s(EmcPmacroDataPadRxCtrl, 28:24, scratch93, 23:19); |
| 260 | s(EmcRdv, 6:0, scratch93, 30:24); |
| 261 | s(EmcCfg, 21:21, scratch93, 31:31); |
| 262 | s(McEmemArbDaCovers, 23:0, scratch94, 23:0); |
| 263 | s(EmcRw2Pden, 6:0, scratch94, 30:24); |
| 264 | s(EmcCfg, 22:22, scratch94, 31:31); |
| 265 | s(EmcPmacroCmdCtrl2, 5:0, scratch95, 5:0); |
| 266 | s(EmcPmacroCmdCtrl2, 13:9, scratch95, 10:6); |
| 267 | s(EmcPmacroCmdCtrl2, 21:16, scratch95, 16:11); |
| 268 | s(EmcPmacroCmdCtrl2, 29:24, scratch95, 22:17); |
| 269 | s(EmcRfcPb, 8:0, scratch95, 31:23); |
| 270 | s(EmcPmacroQuseDdllRank0_0, 10:0, scratch96, 10:0); |
| 271 | s(EmcPmacroQuseDdllRank0_0, 26:16, scratch96, 21:11); |
| 272 | s(EmcCfgUpdate, 2:0, scratch96, 24:22); |
| 273 | s(EmcCfgUpdate, 10:8, scratch96, 27:25); |
| 274 | s(EmcCfgUpdate, 31:28, scratch96, 31:28); |
| 275 | s(EmcPmacroQuseDdllRank0_1, 10:0, scratch97, 10:0); |
| 276 | s(EmcPmacroQuseDdllRank0_1, 26:16, scratch97, 21:11); |
| 277 | s(EmcRfc, 9:0, scratch97, 31:22); |
| 278 | s(EmcPmacroQuseDdllRank0_2, 10:0, scratch98, 10:0); |
| 279 | s(EmcPmacroQuseDdllRank0_2, 26:16, scratch98, 21:11); |
| 280 | s(EmcTxsr, 9:0, scratch98, 31:22); |
| 281 | s(EmcPmacroQuseDdllRank0_3, 10:0, scratch99, 10:0); |
| 282 | s(EmcPmacroQuseDdllRank0_3, 26:16, scratch99, 21:11); |
| 283 | s(EmcMc2EmcQ, 2:0, scratch99, 24:22); |
| 284 | s(EmcMc2EmcQ, 10:8, scratch99, 27:25); |
| 285 | s(EmcMc2EmcQ, 27:24, scratch99, 31:28); |
| 286 | s(EmcPmacroQuseDdllRank0_4, 10:0, scratch100, 10:0); |
| 287 | s(EmcPmacroQuseDdllRank0_4, 26:16, scratch100, 21:11); |
| 288 | s(McEmemArbRing1Throttle, 4:0, scratch100, 26:22); |
| 289 | s(McEmemArbRing1Throttle, 20:16, scratch100, 31:27); |
| 290 | s(EmcPmacroQuseDdllRank0_5, 10:0, scratch101, 10:0); |
| 291 | s(EmcPmacroQuseDdllRank0_5, 26:16, scratch101, 21:11); |
| 292 | s(EmcPmacroQuseDdllRank1_0, 10:0, scratch102, 10:0); |
| 293 | s(EmcPmacroQuseDdllRank1_0, 26:16, scratch102, 21:11); |
| 294 | s(EmcAr2Pden, 8:0, scratch102, 30:22); |
| 295 | s(EmcCfg, 23:23, scratch102, 31:31); |
| 296 | s(EmcPmacroQuseDdllRank1_1, 10:0, scratch103, 10:0); |
| 297 | s(EmcPmacroQuseDdllRank1_1, 26:16, scratch103, 21:11); |
| 298 | s(EmcRfcSlr, 8:0, scratch103, 30:22); |
| 299 | s(EmcCfg, 24:24, scratch103, 31:31); |
| 300 | s(EmcPmacroQuseDdllRank1_2, 10:0, scratch104, 10:0); |
| 301 | s(EmcPmacroQuseDdllRank1_2, 26:16, scratch104, 21:11); |
| 302 | s(EmcIbdly, 6:0, scratch104, 28:22); |
| 303 | s(EmcIbdly, 29:28, scratch104, 30:29); |
| 304 | s(EmcCfg, 25:25, scratch104, 31:31); |
| 305 | s(EmcPmacroQuseDdllRank1_3, 10:0, scratch105, 10:0); |
| 306 | s(EmcPmacroQuseDdllRank1_3, 26:16, scratch105, 21:11); |
| 307 | s(McEmemArbTimingRFCPB, 8:0, scratch105, 30:22); |
| 308 | s(EmcCfg, 26:26, scratch105, 31:31); |
| 309 | s(EmcPmacroQuseDdllRank1_4, 10:0, scratch106, 10:0); |
| 310 | s(EmcPmacroQuseDdllRank1_4, 26:16, scratch106, 21:11); |
| 311 | s(EmcTfaw, 6:0, scratch106, 28:22); |
| 312 | s(EmcPmacroDataPadTxCtrl, 3:2, scratch106, 30:29); |
| 313 | s(EmcCfg, 28:28, scratch106, 31:31); |
| 314 | s(EmcPmacroQuseDdllRank1_5, 10:0, scratch107, 10:0); |
| 315 | s(EmcPmacroQuseDdllRank1_5, 26:16, scratch107, 21:11); |
| 316 | s(EmcTClkStable, 6:0, scratch107, 28:22); |
| 317 | s(EmcPmacroDataPadTxCtrl, 7:6, scratch107, 30:29); |
| 318 | s(EmcCfg, 29:29, scratch107, 31:31); |
| 319 | s(EmcPmacroObDdllLongDqRank0_0, 10:0, scratch108, 10:0); |
| 320 | s(EmcPmacroObDdllLongDqRank0_0, 26:16, scratch108, 21:11); |
| 321 | s(EmcPdex2Mrr, 6:0, scratch108, 28:22); |
| 322 | s(EmcPmacroDataPadTxCtrl, 11:10, scratch108, 30:29); |
| 323 | s(EmcCfg, 30:30, scratch108, 31:31); |
| 324 | s(EmcPmacroObDdllLongDqRank0_1, 10:0, scratch109, 10:0); |
| 325 | s(EmcPmacroObDdllLongDqRank0_1, 26:16, scratch109, 21:11); |
| 326 | s(EmcRdvMask, 6:0, scratch109, 28:22); |
| 327 | s(EmcPmacroDataPadTxCtrl, 15:14, scratch109, 30:29); |
| 328 | s(EmcCfg, 31:31, scratch109, 31:31); |
| 329 | s(EmcPmacroObDdllLongDqRank0_2, 10:0, scratch110, 10:0); |
| 330 | s(EmcPmacroObDdllLongDqRank0_2, 26:16, scratch110, 21:11); |
| 331 | s(EmcRdvEarlyMask, 6:0, scratch110, 28:22); |
| 332 | s(EmcFbioCfg5, 4:4, scratch110, 29:29); |
| 333 | s(EmcFbioCfg5, 8:8, scratch110, 30:30); |
| 334 | s(EmcFbioCfg5, 10:10, scratch110, 31:31); |
| 335 | s(EmcPmacroObDdllLongDqRank0_3, 10:0, scratch111, 10:0); |
| 336 | s(EmcPmacroObDdllLongDqRank0_3, 26:16, scratch111, 21:11); |
| 337 | s(EmcRdvEarly, 6:0, scratch111, 28:22); |
| 338 | s(EmcFbioCfg5, 12:12, scratch111, 29:29); |
| 339 | s(EmcFbioCfg5, 25:24, scratch111, 31:30); |
| 340 | s(EmcPmacroObDdllLongDqRank0_4, 10:0, scratch112, 10:0); |
| 341 | s(EmcPmacroObDdllLongDqRank0_4, 26:16, scratch112, 21:11); |
| 342 | s(EmcPmacroDdllShortCmd_2, 6:0, scratch112, 28:22); |
| 343 | s(EmcFbioCfg5, 28:26, scratch112, 31:29); |
| 344 | s(EmcPmacroObDdllLongDqRank0_5, 10:0, scratch113, 10:0); |
| 345 | s(EmcPmacroObDdllLongDqRank0_5, 26:16, scratch113, 21:11); |
| 346 | s(McEmemArbTimingRp, 6:0, scratch113, 28:22); |
| 347 | s(EmcFbioCfg5, 31:30, scratch113, 30:29); |
| 348 | s(EmcCfg2, 0:0, scratch113, 31:31); |
| 349 | s(EmcPmacroObDdllLongDqRank1_0, 10:0, scratch114, 10:0); |
| 350 | s(EmcPmacroObDdllLongDqRank1_0, 26:16, scratch114, 21:11); |
| 351 | s(McEmemArbTimingRas, 6:0, scratch114, 28:22); |
| 352 | s(EmcCfg2, 2:1, scratch114, 30:29); |
| 353 | s(EmcCfg2, 7:7, scratch114, 31:31); |
| 354 | s(EmcPmacroObDdllLongDqRank1_1, 10:0, scratch115, 10:0); |
| 355 | s(EmcPmacroObDdllLongDqRank1_1, 26:16, scratch115, 21:11); |
| 356 | s(McEmemArbTimingFaw, 6:0, scratch115, 28:22); |
| 357 | s(EmcCfg2, 11:10, scratch115, 30:29); |
| 358 | s(EmcCfg2, 14:14, scratch115, 31:31); |
| 359 | s(EmcPmacroObDdllLongDqRank1_2, 10:0, scratch123, 10:0); |
| 360 | s(EmcPmacroObDdllLongDqRank1_2, 26:16, scratch123, 21:11); |
| 361 | s(McEmemArbTimingRap2Pre, 6:0, scratch123, 28:22); |
| 362 | s(EmcCfg2, 16:15, scratch123, 30:29); |
| 363 | s(EmcCfg2, 20:20, scratch123, 31:31); |
| 364 | s(EmcPmacroObDdllLongDqRank1_3, 10:0, scratch124, 10:0); |
| 365 | s(EmcPmacroObDdllLongDqRank1_3, 26:16, scratch124, 21:11); |
| 366 | s(McEmemArbTimingWap2Pre, 6:0, scratch124, 28:22); |
| 367 | s(EmcCfg2, 24:22, scratch124, 31:29); |
| 368 | s(EmcPmacroObDdllLongDqRank1_4, 10:0, scratch125, 10:0); |
| 369 | s(EmcPmacroObDdllLongDqRank1_4, 26:16, scratch125, 21:11); |
| 370 | s(McEmemArbTimingR2W, 6:0, scratch125, 28:22); |
| 371 | s(EmcCfg2, 25:25, scratch125, 29:29); |
| 372 | s(EmcCfg2, 29:28, scratch125, 31:30); |
| 373 | s(EmcPmacroObDdllLongDqRank1_5, 10:0, scratch126, 10:0); |
| 374 | s(EmcPmacroObDdllLongDqRank1_5, 26:16, scratch126, 21:11); |
| 375 | s(McEmemArbTimingW2R, 6:0, scratch126, 28:22); |
| 376 | s(EmcCfg2, 31:30, scratch126, 30:29); |
| 377 | s(EmcCfgPipe, 0:0, scratch126, 31:31); |
| 378 | s(EmcPmacroObDdllLongDqsRank0_0, 10:0, scratch127, 10:0); |
| 379 | s(EmcPmacroObDdllLongDqsRank0_0, 26:16, scratch127, 21:11); |
| 380 | s(EmcRp, 5:0, scratch127, 27:22); |
| 381 | s(EmcCfgPipe, 4:1, scratch127, 31:28); |
| 382 | s(EmcPmacroObDdllLongDqsRank0_1, 10:0, scratch128, 10:0); |
| 383 | s(EmcPmacroObDdllLongDqsRank0_1, 26:16, scratch128, 21:11); |
| 384 | s(EmcR2w, 5:0, scratch128, 27:22); |
| 385 | s(EmcCfgPipe, 8:5, scratch128, 31:28); |
| 386 | s(EmcPmacroObDdllLongDqsRank0_2, 10:0, scratch129, 10:0); |
| 387 | s(EmcPmacroObDdllLongDqsRank0_2, 26:16, scratch129, 21:11); |
| 388 | s(EmcW2r, 5:0, scratch129, 27:22); |
| 389 | s(EmcCfgPipe, 11:9, scratch129, 30:28); |
| 390 | s(EmcCfgPipe, 16:16, scratch129, 31:31); |
| 391 | s(EmcPmacroObDdllLongDqsRank0_3, 10:0, scratch130, 10:0); |
| 392 | s(EmcPmacroObDdllLongDqsRank0_3, 26:16, scratch130, 21:11); |
| 393 | s(EmcR2p, 5:0, scratch130, 27:22); |
| 394 | s(EmcCfgPipe, 20:17, scratch130, 31:28); |
| 395 | s(EmcPmacroObDdllLongDqsRank0_4, 10:0, scratch131, 10:0); |
| 396 | s(EmcPmacroObDdllLongDqsRank0_4, 26:16, scratch131, 21:11); |
| 397 | s(EmcCcdmw, 5:0, scratch131, 27:22); |
| 398 | s(EmcCfgPipe, 24:21, scratch131, 31:28); |
| 399 | s(EmcPmacroObDdllLongDqsRank0_5, 10:0, scratch132, 10:0); |
| 400 | s(EmcPmacroObDdllLongDqsRank0_5, 26:16, scratch132, 21:11); |
| 401 | s(EmcRdRcd, 5:0, scratch132, 27:22); |
| 402 | s(EmcCfgPipe, 27:25, scratch132, 30:28); |
| 403 | s(EmcPmacroTxPwrd0, 0:0, scratch132, 31:31); |
| 404 | s(EmcPmacroObDdllLongDqsRank1_0, 10:0, scratch133, 10:0); |
| 405 | s(EmcPmacroObDdllLongDqsRank1_0, 26:16, scratch133, 21:11); |
| 406 | s(EmcWrRcd, 5:0, scratch133, 27:22); |
| 407 | s(EmcPmacroTxPwrd0, 4:1, scratch133, 31:28); |
| 408 | s(EmcPmacroObDdllLongDqsRank1_1, 10:0, scratch134, 10:0); |
| 409 | s(EmcPmacroObDdllLongDqsRank1_1, 26:16, scratch134, 21:11); |
| 410 | s(EmcWdv, 5:0, scratch134, 27:22); |
| 411 | s(EmcPmacroTxPwrd0, 8:5, scratch134, 31:28); |
| 412 | s(EmcPmacroObDdllLongDqsRank1_2, 10:0, scratch135, 10:0); |
| 413 | s(EmcPmacroObDdllLongDqsRank1_2, 26:16, scratch135, 21:11); |
| 414 | s(EmcQUse, 5:0, scratch135, 27:22); |
| 415 | s(EmcPmacroTxPwrd0, 12:9, scratch135, 31:28); |
| 416 | s(EmcPmacroObDdllLongDqsRank1_3, 10:0, scratch136, 10:0); |
| 417 | s(EmcPmacroObDdllLongDqsRank1_3, 26:16, scratch136, 21:11); |
| 418 | s(EmcPdEx2Wr, 5:0, scratch136, 27:22); |
| 419 | s(EmcPmacroTxPwrd0, 13:13, scratch136, 28:28); |
| 420 | s(EmcPmacroTxPwrd0, 18:16, scratch136, 31:29); |
| 421 | s(EmcPmacroObDdllLongDqsRank1_4, 10:0, scratch137, 10:0); |
| 422 | s(EmcPmacroObDdllLongDqsRank1_4, 26:16, scratch137, 21:11); |
| 423 | s(EmcPdEx2Rd, 5:0, scratch137, 27:22); |
| 424 | s(EmcPmacroTxPwrd0, 22:19, scratch137, 31:28); |
| 425 | s(EmcPmacroObDdllLongDqsRank1_5, 10:0, scratch138, 10:0); |
| 426 | s(EmcPmacroObDdllLongDqsRank1_5, 26:16, scratch138, 21:11); |
| 427 | s(EmcPdex2Cke, 5:0, scratch138, 27:22); |
| 428 | s(EmcPmacroTxPwrd0, 26:23, scratch138, 31:28); |
| 429 | s(EmcPmacroIbDdllLongDqsRank0_0, 10:0, scratch139, 10:0); |
| 430 | s(EmcPmacroIbDdllLongDqsRank0_0, 26:16, scratch139, 21:11); |
| 431 | s(EmcPChg2Pden, 5:0, scratch139, 27:22); |
| 432 | s(EmcPmacroTxPwrd0, 29:27, scratch139, 30:28); |
| 433 | s(EmcPmacroTxPwrd1, 0:0, scratch139, 31:31); |
| 434 | s(EmcPmacroIbDdllLongDqsRank0_1, 10:0, scratch140, 10:0); |
| 435 | s(EmcPmacroIbDdllLongDqsRank0_1, 26:16, scratch140, 21:11); |
| 436 | s(EmcAct2Pden, 5:0, scratch140, 27:22); |
| 437 | s(EmcPmacroTxPwrd1, 4:1, scratch140, 31:28); |
| 438 | s(EmcPmacroIbDdllLongDqsRank0_2, 10:0, scratch141, 10:0); |
| 439 | s(EmcPmacroIbDdllLongDqsRank0_2, 26:16, scratch141, 21:11); |
| 440 | s(EmcCke2Pden, 5:0, scratch141, 27:22); |
| 441 | s(EmcPmacroTxPwrd1, 8:5, scratch141, 31:28); |
| 442 | s(EmcPmacroIbDdllLongDqsRank0_3, 10:0, scratch142, 10:0); |
| 443 | s(EmcPmacroIbDdllLongDqsRank0_3, 26:16, scratch142, 21:11); |
| 444 | s(EmcTcke, 5:0, scratch142, 27:22); |
| 445 | s(EmcPmacroTxPwrd1, 12:9, scratch142, 31:28); |
| 446 | s(EmcPmacroIbDdllLongDqsRank1_0, 10:0, scratch143, 10:0); |
| 447 | s(EmcPmacroIbDdllLongDqsRank1_0, 26:16, scratch143, 21:11); |
| 448 | s(EmcTrpab, 5:0, scratch143, 27:22); |
| 449 | s(EmcPmacroTxPwrd1, 13:13, scratch143, 28:28); |
| 450 | s(EmcPmacroTxPwrd1, 18:16, scratch143, 31:29); |
| 451 | s(EmcPmacroIbDdllLongDqsRank1_1, 10:0, scratch144, 10:0); |
| 452 | s(EmcPmacroIbDdllLongDqsRank1_1, 26:16, scratch144, 21:11); |
| 453 | s(EmcClkenOverride, 3:1, scratch144, 24:22); |
| 454 | s(EmcClkenOverride, 8:6, scratch144, 27:25); |
| 455 | s(EmcPmacroTxPwrd1, 22:19, scratch144, 31:28); |
| 456 | s(EmcPmacroIbDdllLongDqsRank1_2, 10:0, scratch145, 10:0); |
| 457 | s(EmcPmacroIbDdllLongDqsRank1_2, 26:16, scratch145, 21:11); |
| 458 | s(EmcEInput, 5:0, scratch145, 27:22); |
| 459 | s(EmcPmacroTxPwrd1, 26:23, scratch145, 31:28); |
| 460 | s(EmcPmacroIbDdllLongDqsRank1_3, 10:0, scratch146, 10:0); |
| 461 | s(EmcPmacroIbDdllLongDqsRank1_3, 26:16, scratch146, 21:11); |
| 462 | s(EmcEInputDuration, 5:0, scratch146, 27:22); |
| 463 | s(EmcPmacroTxPwrd1, 29:27, scratch146, 30:28); |
| 464 | s(EmcPmacroTxPwrd2, 0:0, scratch146, 31:31); |
| 465 | s(EmcPmacroDdllLongCmd_0, 10:0, scratch147, 10:0); |
| 466 | s(EmcPmacroDdllLongCmd_0, 26:16, scratch147, 21:11); |
| 467 | s(EmcPutermExtra, 5:0, scratch147, 27:22); |
| 468 | s(EmcPmacroTxPwrd2, 4:1, scratch147, 31:28); |
| 469 | s(EmcPmacroDdllLongCmd_1, 10:0, scratch148, 10:0); |
| 470 | s(EmcPmacroDdllLongCmd_1, 26:16, scratch148, 21:11); |
| 471 | s(EmcTckesr, 5:0, scratch148, 27:22); |
| 472 | s(EmcPmacroTxPwrd2, 8:5, scratch148, 31:28); |
| 473 | s(EmcPmacroDdllLongCmd_2, 10:0, scratch149, 10:0); |
| 474 | s(EmcPmacroDdllLongCmd_2, 26:16, scratch149, 21:11); |
| 475 | s(EmcTpd, 5:0, scratch149, 27:22); |
| 476 | s(EmcPmacroTxPwrd2, 12:9, scratch149, 31:28); |
| 477 | s(EmcPmacroDdllLongCmd_3, 10:0, scratch150, 10:0); |
| 478 | s(EmcPmacroDdllLongCmd_3, 26:16, scratch150, 21:11); |
| 479 | s(EmcWdvMask, 5:0, scratch150, 27:22); |
| 480 | s(EmcPmacroTxPwrd2, 13:13, scratch150, 28:28); |
| 481 | s(EmcPmacroTxPwrd2, 18:16, scratch150, 31:29); |
| 482 | s(McEmemArbCfg, 8:0, scratch151, 8:0); |
| 483 | s(McEmemArbCfg, 20:16, scratch151, 13:9); |
| 484 | s(McEmemArbCfg, 31:24, scratch151, 21:14); |
| 485 | s(EmcWdvChk, 5:0, scratch151, 27:22); |
| 486 | s(EmcPmacroTxPwrd2, 22:19, scratch151, 31:28); |
| 487 | s(McEmemArbMisc1, 12:0, scratch152, 12:0); |
| 488 | s(McEmemArbMisc1, 25:21, scratch152, 17:13); |
| 489 | s(McEmemArbMisc1, 31:28, scratch152, 21:18); |
| 490 | s(EmcCmdBrlshft0, 5:0, scratch152, 27:22); |
| 491 | s(EmcPmacroTxPwrd2, 26:23, scratch152, 31:28); |
| 492 | s(EmcMrsWaitCnt2, 9:0, scratch153, 9:0); |
| 493 | s(EmcMrsWaitCnt2, 26:16, scratch153, 20:10); |
| 494 | s(EmcPmacroIbRxrt, 10:0, scratch153, 31:21); |
| 495 | s(EmcMrsWaitCnt, 9:0, scratch154, 9:0); |
| 496 | s(EmcMrsWaitCnt, 26:16, scratch154, 20:10); |
| 497 | s(EmcPmacroDdllLongCmd_4, 10:0, scratch154, 31:21); |
| 498 | s(EmcAutoCalInterval, 20:0, scratch155, 20:0); |
| 499 | s(McEmemArbOutstandingReq, 8:0, scratch155, 29:21); |
| 500 | s(McEmemArbOutstandingReq, 31:30, scratch155, 31:30); |
| 501 | s(McEmemArbRefpbHpCtrl, 6:0, scratch156, 6:0); |
| 502 | s(McEmemArbRefpbHpCtrl, 14:8, scratch156, 13:7); |
| 503 | s(McEmemArbRefpbHpCtrl, 22:16, scratch156, 20:14); |
| 504 | s(EmcCmdBrlshft1, 5:0, scratch156, 26:21); |
| 505 | s(EmcRrd, 4:0, scratch156, 31:27); |
| 506 | s(EmcQuseBrlshft0, 19:0, scratch157, 19:0); |
| 507 | s(EmcFbioCfg8, 27:16, scratch157, 31:20); |
| 508 | s(EmcQuseBrlshft1, 19:0, scratch158, 19:0); |
| 509 | s(EmcTxsrDll, 11:0, scratch158, 31:20); |
| 510 | s(EmcQuseBrlshft2, 19:0, scratch159, 19:0); |
| 511 | s(EmcTxdsrvttgen, 11:0, scratch159, 31:20); |
| 512 | s(EmcQuseBrlshft3, 19:0, scratch160, 19:0); |
| 513 | s(EmcPmacroVttgenCtrl0, 3:0, scratch160, 23:20); |
| 514 | s(EmcPmacroVttgenCtrl0, 11:8, scratch160, 27:24); |
| 515 | s(EmcPmacroVttgenCtrl0, 19:16, scratch160, 31:28); |
| 516 | s(EmcPmacroVttgenCtrl1, 19:0, scratch161, 19:0); |
| 517 | s(EmcCmdBrlshft2, 5:0, scratch161, 25:20); |
| 518 | s(EmcCmdBrlshft3, 5:0, scratch161, 31:26); |
| 519 | s(EmcAutoCalConfig3, 5:0, scratch162, 5:0); |
| 520 | s(EmcAutoCalConfig3, 13:8, scratch162, 11:6); |
| 521 | s(EmcAutoCalConfig3, 18:16, scratch162, 14:12); |
| 522 | s(EmcAutoCalConfig3, 22:20, scratch162, 17:15); |
| 523 | s(EmcTRefBw, 13:0, scratch162, 31:18); |
| 524 | s(EmcAutoCalConfig4, 5:0, scratch163, 5:0); |
| 525 | s(EmcAutoCalConfig4, 13:8, scratch163, 11:6); |
| 526 | s(EmcAutoCalConfig4, 18:16, scratch163, 14:12); |
| 527 | s(EmcAutoCalConfig4, 22:20, scratch163, 17:15); |
| 528 | s(EmcQpop, 6:0, scratch163, 24:18); |
| 529 | s(EmcQpop, 22:16, scratch163, 31:25); |
| 530 | s(EmcAutoCalConfig5, 5:0, scratch164, 5:0); |
| 531 | s(EmcAutoCalConfig5, 13:8, scratch164, 11:6); |
| 532 | s(EmcAutoCalConfig5, 18:16, scratch164, 14:12); |
| 533 | s(EmcAutoCalConfig5, 22:20, scratch164, 17:15); |
| 534 | s(EmcPmacroAutocalCfgCommon, 5:0, scratch164, 23:18); |
| 535 | s(EmcPmacroAutocalCfgCommon, 13:8, scratch164, 29:24); |
| 536 | s(EmcPmacroAutocalCfgCommon, 16:16, scratch164, 30:30); |
| 537 | s(EmcPmacroTxPwrd2, 27:27, scratch164, 31:31); |
| 538 | s(EmcAutoCalConfig6, 5:0, scratch165, 5:0); |
| 539 | s(EmcAutoCalConfig6, 13:8, scratch165, 11:6); |
| 540 | s(EmcAutoCalConfig6, 18:16, scratch165, 14:12); |
| 541 | s(EmcAutoCalConfig6, 22:20, scratch165, 17:15); |
| 542 | s(EmcWev, 5:0, scratch165, 23:18); |
| 543 | s(EmcWsv, 5:0, scratch165, 29:24); |
| 544 | s(EmcPmacroTxPwrd2, 29:28, scratch165, 31:30); |
| 545 | s(EmcAutoCalConfig7, 5:0, scratch166, 5:0); |
| 546 | s(EmcAutoCalConfig7, 13:8, scratch166, 11:6); |
| 547 | s(EmcAutoCalConfig7, 18:16, scratch166, 14:12); |
| 548 | s(EmcAutoCalConfig7, 22:20, scratch166, 17:15); |
| 549 | s(EmcCfg3, 2:0, scratch166, 20:18); |
| 550 | s(EmcCfg3, 6:4, scratch166, 23:21); |
| 551 | s(EmcQuseWidth, 3:0, scratch166, 27:24); |
| 552 | s(EmcQuseWidth, 29:28, scratch166, 29:28); |
| 553 | s(EmcPmacroTxPwrd3, 1:0, scratch166, 31:30); |
| 554 | s(EmcAutoCalConfig8, 5:0, scratch167, 5:0); |
| 555 | s(EmcAutoCalConfig8, 13:8, scratch167, 11:6); |
| 556 | s(EmcAutoCalConfig8, 18:16, scratch167, 14:12); |
| 557 | s(EmcAutoCalConfig8, 22:20, scratch167, 17:15); |
| 558 | s(EmcPmacroBgBiasCtrl0, 2:0, scratch167, 20:18); |
| 559 | s(EmcPmacroBgBiasCtrl0, 6:4, scratch167, 23:21); |
| 560 | s(McEmemArbTimingRcd, 5:0, scratch167, 29:24); |
| 561 | s(EmcPmacroTxPwrd3, 3:2, scratch167, 31:30); |
| 562 | s(EmcXm2CompPadCtrl2, 17:0, scratch168, 17:0); |
| 563 | s(McEmemArbTimingCcdmw, 5:0, scratch168, 23:18); |
| 564 | s(McEmemArbOverride, 27:27, scratch168, 24:24); |
| 565 | s(McEmemArbOverride, 26:26, scratch168, 25:25); |
| 566 | s(McEmemArbOverride, 16:16, scratch168, 26:26); |
| 567 | s(McEmemArbOverride, 10:10, scratch168, 27:27); |
| 568 | s(McEmemArbOverride, 4:4, scratch168, 28:28); |
| 569 | s(McEmemArbOverride, 3:3, scratch168, 29:29); |
| 570 | s(EmcPmacroTxPwrd3, 5:4, scratch168, 31:30); |
| 571 | s(EmcXm2CompPadCtrl3, 17:0, scratch169, 17:0); |
| 572 | s(EmcRext, 4:0, scratch169, 22:18); |
| 573 | s(EmcTClkStop, 4:0, scratch169, 27:23); |
| 574 | s(EmcPmacroTxPwrd3, 9:6, scratch169, 31:28); |
| 575 | s(EmcZcalWaitCnt, 10:0, scratch170, 10:0); |
| 576 | s(EmcZcalWaitCnt, 21:16, scratch170, 16:11); |
| 577 | s(EmcZcalWaitCnt, 31:31, scratch170, 17:17); |
| 578 | s(EmcWext, 4:0, scratch170, 22:18); |
| 579 | s(EmcRefctrl2, 0:0, scratch170, 23:23); |
| 580 | s(EmcRefctrl2, 26:24, scratch170, 26:24); |
| 581 | s(EmcRefctrl2, 31:31, scratch170, 27:27); |
| 582 | s(EmcPmacroTxPwrd3, 13:10, scratch170, 31:28); |
| 583 | s(EmcZcalMrwCmd, 7:0, scratch171, 7:0); |
| 584 | s(EmcZcalMrwCmd, 23:16, scratch171, 15:8); |
| 585 | s(EmcZcalMrwCmd, 31:30, scratch171, 17:16); |
| 586 | s(EmcWeDuration, 4:0, scratch171, 22:18); |
| 587 | s(EmcWsDuration, 4:0, scratch171, 27:23); |
| 588 | s(EmcPmacroTxPwrd3, 19:16, scratch171, 31:28); |
| 589 | s(EmcSwizzleRank0Byte0, 2:0, scratch172, 2:0); |
| 590 | s(EmcSwizzleRank0Byte0, 6:4, scratch172, 5:3); |
| 591 | s(EmcSwizzleRank0Byte0, 10:8, scratch172, 8:6); |
| 592 | s(EmcSwizzleRank0Byte0, 14:12, scratch172, 11:9); |
| 593 | s(EmcSwizzleRank0Byte0, 18:16, scratch172, 14:12); |
| 594 | s(EmcSwizzleRank0Byte0, 22:20, scratch172, 17:15); |
| 595 | s(EmcPutermWidth, 31:31, scratch172, 18:18); |
| 596 | s(EmcPutermWidth, 3:0, scratch172, 22:19); |
| 597 | s(McEmemArbTimingRrd, 4:0, scratch172, 27:23); |
| 598 | s(EmcPmacroTxPwrd3, 23:20, scratch172, 31:28); |
| 599 | s(EmcSwizzleRank0Byte1, 2:0, scratch173, 2:0); |
| 600 | s(EmcSwizzleRank0Byte1, 6:4, scratch173, 5:3); |
| 601 | s(EmcSwizzleRank0Byte1, 10:8, scratch173, 8:6); |
| 602 | s(EmcSwizzleRank0Byte1, 14:12, scratch173, 11:9); |
| 603 | s(EmcSwizzleRank0Byte1, 18:16, scratch173, 14:12); |
| 604 | s(EmcSwizzleRank0Byte1, 22:20, scratch173, 17:15); |
| 605 | s(McEmemArbTimingR2R, 4:0, scratch173, 22:18); |
| 606 | s(McEmemArbTimingW2W, 4:0, scratch173, 27:23); |
| 607 | s(EmcPmacroTxPwrd3, 27:24, scratch173, 31:28); |
| 608 | s(EmcSwizzleRank0Byte2, 2:0, scratch174, 2:0); |
| 609 | s(EmcSwizzleRank0Byte2, 6:4, scratch174, 5:3); |
| 610 | s(EmcSwizzleRank0Byte2, 10:8, scratch174, 8:6); |
| 611 | s(EmcSwizzleRank0Byte2, 14:12, scratch174, 11:9); |
| 612 | s(EmcSwizzleRank0Byte2, 18:16, scratch174, 14:12); |
| 613 | s(EmcSwizzleRank0Byte2, 22:20, scratch174, 17:15); |
| 614 | s(EmcPmacroTxPwrd3, 29:28, scratch174, 19:18); |
| 615 | s(EmcPmacroTxSelClkSrc0, 11:0, scratch174, 31:20); |
| 616 | s(EmcSwizzleRank0Byte3, 2:0, scratch175, 2:0); |
| 617 | s(EmcSwizzleRank0Byte3, 6:4, scratch175, 5:3); |
| 618 | s(EmcSwizzleRank0Byte3, 10:8, scratch175, 8:6); |
| 619 | s(EmcSwizzleRank0Byte3, 14:12, scratch175, 11:9); |
| 620 | s(EmcSwizzleRank0Byte3, 18:16, scratch175, 14:12); |
| 621 | s(EmcSwizzleRank0Byte3, 22:20, scratch175, 17:15); |
| 622 | s(EmcPmacroTxSelClkSrc0, 27:16, scratch175, 29:18); |
| 623 | s(EmcPmacroTxSelClkSrc1, 1:0, scratch175, 31:30); |
| 624 | s(EmcSwizzleRank1Byte0, 2:0, scratch176, 2:0); |
| 625 | s(EmcSwizzleRank1Byte0, 6:4, scratch176, 5:3); |
| 626 | s(EmcSwizzleRank1Byte0, 10:8, scratch176, 8:6); |
| 627 | s(EmcSwizzleRank1Byte0, 14:12, scratch176, 11:9); |
| 628 | s(EmcSwizzleRank1Byte0, 18:16, scratch176, 14:12); |
| 629 | s(EmcSwizzleRank1Byte0, 22:20, scratch176, 17:15); |
| 630 | s(EmcPmacroTxSelClkSrc1, 11:2, scratch176, 27:18); |
| 631 | s(EmcPmacroTxSelClkSrc1, 19:16, scratch176, 31:28); |
| 632 | s(EmcSwizzleRank1Byte1, 2:0, scratch177, 2:0); |
| 633 | s(EmcSwizzleRank1Byte1, 6:4, scratch177, 5:3); |
| 634 | s(EmcSwizzleRank1Byte1, 10:8, scratch177, 8:6); |
| 635 | s(EmcSwizzleRank1Byte1, 14:12, scratch177, 11:9); |
| 636 | s(EmcSwizzleRank1Byte1, 18:16, scratch177, 14:12); |
| 637 | s(EmcSwizzleRank1Byte1, 22:20, scratch177, 17:15); |
| 638 | s(EmcPmacroTxSelClkSrc1, 27:20, scratch177, 25:18); |
| 639 | s(EmcPmacroTxSelClkSrc3, 5:0, scratch177, 31:26); |
| 640 | s(EmcSwizzleRank1Byte2, 2:0, scratch178, 2:0); |
| 641 | s(EmcSwizzleRank1Byte2, 6:4, scratch178, 5:3); |
| 642 | s(EmcSwizzleRank1Byte2, 10:8, scratch178, 8:6); |
| 643 | s(EmcSwizzleRank1Byte2, 14:12, scratch178, 11:9); |
| 644 | s(EmcSwizzleRank1Byte2, 18:16, scratch178, 14:12); |
| 645 | s(EmcSwizzleRank1Byte2, 22:20, scratch178, 17:15); |
| 646 | s(EmcPmacroTxSelClkSrc3, 11:6, scratch178, 23:18); |
| 647 | s(EmcPmacroTxSelClkSrc3, 23:16, scratch178, 31:24); |
| 648 | s(EmcSwizzleRank1Byte3, 2:0, scratch179, 2:0); |
| 649 | s(EmcSwizzleRank1Byte3, 6:4, scratch179, 5:3); |
| 650 | s(EmcSwizzleRank1Byte3, 10:8, scratch179, 8:6); |
| 651 | s(EmcSwizzleRank1Byte3, 14:12, scratch179, 11:9); |
| 652 | s(EmcSwizzleRank1Byte3, 18:16, scratch179, 14:12); |
| 653 | s(EmcSwizzleRank1Byte3, 22:20, scratch179, 17:15); |
| 654 | s(EmcPmacroTxSelClkSrc3, 27:24, scratch179, 21:18); |
| 655 | s(EmcPmacroTxSelClkSrc2, 9:0, scratch179, 31:22); |
| 656 | s(EmcPmacroCmdBrickCtrlFdpd, 17:0, scratch180, 17:0); |
| 657 | s(EmcPmacroTxSelClkSrc2, 11:10, scratch180, 19:18); |
| 658 | s(EmcPmacroTxSelClkSrc2, 27:16, scratch180, 31:20); |
| 659 | s(EmcPmacroDataBrickCtrlFdpd, 17:0, scratch181, 17:0); |
| 660 | s(EmcPmacroTxSelClkSrc4, 11:0, scratch181, 29:18); |
| 661 | s(EmcPmacroTxSelClkSrc4, 17:16, scratch181, 31:30); |
| 662 | s(EmcFbioCfg7, 16:0, scratch182, 16:0); |
| 663 | s(McEmemArbRefpbBankCtrl, 6:0, scratch182, 23:17); |
| 664 | s(McEmemArbRefpbBankCtrl, 14:8, scratch182, 30:24); |
| 665 | s(McEmemArbRefpbBankCtrl, 31:31, scratch182, 31:31); |
| 666 | s(EmcDynSelfRefControl, 15:0, scratch183, 15:0); |
| 667 | s(EmcDynSelfRefControl, 31:31, scratch183, 16:16); |
| 668 | s(EmcPmacroTxSelClkSrc4, 27:18, scratch183, 26:17); |
| 669 | s(EmcPmacroTxSelClkSrc5, 4:0, scratch183, 31:27); |
| 670 | s(EmcDllCfg1, 16:0, scratch184, 16:0); |
| 671 | s(EmcPmacroTxSelClkSrc5, 11:5, scratch184, 23:17); |
| 672 | s(EmcPmacroTxSelClkSrc5, 23:16, scratch184, 31:24); |
| 673 | s(EmcPmacroPadCfgCtrl, 1:0, scratch185, 1:0); |
| 674 | s(EmcPmacroPadCfgCtrl, 6:5, scratch185, 3:2); |
| 675 | s(EmcPmacroPadCfgCtrl, 11:9, scratch185, 6:4); |
| 676 | s(EmcPmacroPadCfgCtrl, 13:13, scratch185, 7:7); |
| 677 | s(EmcPmacroPadCfgCtrl, 17:16, scratch185, 9:8); |
| 678 | s(EmcPmacroPadCfgCtrl, 21:20, scratch185, 11:10); |
| 679 | s(EmcPmacroPadCfgCtrl, 25:24, scratch185, 13:12); |
| 680 | s(EmcPmacroPadCfgCtrl, 30:28, scratch185, 16:14); |
| 681 | s(EmcPmacroTxSelClkSrc5, 27:24, scratch185, 20:17); |
| 682 | s(EmcPmacroCmdPadTxCtrl, 1:0, scratch185, 22:21); |
| 683 | s(EmcPmacroCmdPadTxCtrl, 5:4, scratch185, 24:23); |
| 684 | s(EmcPmacroCmdPadTxCtrl, 9:8, scratch185, 26:25); |
| 685 | s(EmcPmacroCmdPadTxCtrl, 13:12, scratch185, 28:27); |
| 686 | s(EmcPmacroCmdPadTxCtrl, 16:16, scratch185, 29:29); |
| 687 | s(EmcPmacroCmdPadTxCtrl, 21:20, scratch185, 31:30); |
| 688 | s(EmcRefresh, 15:0, scratch186, 15:0); |
| 689 | s(EmcCmdQ, 4:0, scratch186, 20:16); |
| 690 | s(EmcCmdQ, 10:8, scratch186, 23:21); |
| 691 | s(EmcCmdQ, 14:12, scratch186, 26:24); |
| 692 | s(EmcCmdQ, 28:24, scratch186, 31:27); |
| 693 | s(EmcAcpdControl, 15:0, scratch187, 15:0); |
| 694 | s(EmcAutoCalVrefSel1, 15:0, scratch187, 31:16); |
| 695 | s(EmcXm2CompPadCtrl, 1:0, scratch188, 1:0); |
| 696 | s(EmcXm2CompPadCtrl, 6:3, scratch188, 5:2); |
| 697 | s(EmcXm2CompPadCtrl, 9:9, scratch188, 6:6); |
| 698 | s(EmcXm2CompPadCtrl, 19:11, scratch188, 15:7); |
| 699 | s(EmcCfgDigDllPeriod, 15:0, scratch188, 31:16); |
| 700 | s(EmcCfgDigDll_1, 15:0, scratch189, 15:0); |
| 701 | s(EmcPreRefreshReqCnt, 15:0, scratch189, 31:16); |
| 702 | s(EmcPmacroCmdPadTxCtrl, 27:24, scratch190, 19:16); |
| 703 | s(EmcPmacroDataPadTxCtrl, 1:0, scratch190, 21:20); |
| 704 | s(EmcPmacroDataPadTxCtrl, 5:4, scratch190, 23:22); |
| 705 | s(EmcPmacroDataPadTxCtrl, 9:8, scratch190, 25:24); |
| 706 | s(EmcPmacroDataPadTxCtrl, 13:12, scratch190, 27:26); |
| 707 | s(EmcPmacroDataPadTxCtrl, 16:16, scratch190, 28:28); |
| 708 | s(EmcPmacroDataPadTxCtrl, 21:20, scratch190, 30:29); |
| 709 | s(EmcPmacroDataPadTxCtrl, 24:24, scratch190, 31:31); |
| 710 | s(EmcPmacroDataPadTxCtrl, 27:25, scratch191, 2:0); |
| 711 | |
| 712 | s(EmcPinGpio, 1:0, scratch8, 31:30); |
| 713 | s(EmcPinGpioEn, 1:0, scratch9, 31:30); |
| 714 | s(EmcDevSelect, 1:0, scratch10, 31:30); |
| 715 | s(EmcZcalWarmColdBootEnables, 1:0, scratch11, 31:30); |
| 716 | s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch12, 31:30); |
| 717 | s32(EmcBctSpare13, scratch31); |
| 718 | s32(EmcBctSpare12, scratch32); |
| 719 | s32(EmcBctSpare7, scratch33); |
| 720 | s32(EmcBctSpare6, scratch40); |
| 721 | s32(EmcBctSpare5, scratch42); |
| 722 | s32(EmcBctSpare4, scratch44); |
| 723 | s32(SwizzleRankByteEncode, scratch45); |
Yen Lin | 3ad69e8 | 2015-08-20 15:19:07 -0700 | [diff] [blame] | 724 | s32(EmcBctSpare2, scratch46); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 725 | s32(EmcBctSpare1, scratch47); |
| 726 | s32(EmcBctSpare0, scratch48); |
| 727 | s32(EmcBctSpare9, scratch50); |
| 728 | s32(EmcBctSpare8, scratch51); |
| 729 | s32(BootRomPatchData, scratch56); |
| 730 | s32(BootRomPatchControl, scratch57); |
| 731 | s(McClkenOverrideAllWarmBoot, 0:0, scratch58, 31:31); |
| 732 | s(EmcClkenOverrideAllWarmBoot, 0:0, scratch59, 30:30); |
| 733 | s(EmcMrsWarmBootEnable, 0:0, scratch59, 31:31); |
| 734 | s(ClearClk2Mc1, 0:0, scratch60, 30:30); |
| 735 | s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch60, 31:31); |
| 736 | s(ClkRstControllerPllmMisc2OverrideEnable, 0:0, scratch61, 30:30); |
| 737 | s(EmcDbgWriteMux, 0:0, scratch61, 31:31); |
| 738 | s(EmcExtraRefreshNum, 2:0, scratch62, 31:29); |
| 739 | s(PmcIoDpd3ReqWait, 2:0, scratch68, 30:28); |
| 740 | s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch68, 31:31); |
| 741 | s(MemoryType, 2:0, scratch69, 30:28); |
| 742 | s(PmcIoDpd4ReqWait, 2:0, scratch70, 30:28); |
| 743 | s(EmcTimingControlWait, 7:0, scratch86, 31:24); |
| 744 | s(EmcZcalWarmBootWait, 7:0, scratch87, 31:24); |
| 745 | s(WarmBootWait, 7:0, scratch88, 31:24); |
| 746 | s(EmcPinProgramWait, 7:0, scratch89, 31:24); |
| 747 | s(EmcAutoCalWait, 9:0, scratch101, 31:22); |
| 748 | s(SwizzleRankByteEncode, 15:0, scratch190, 15:0); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 749 | |
| 750 | switch (sdram->MemoryType) { |
| 751 | case NvBootMemoryType_LpDdr2: |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 752 | case NvBootMemoryType_LpDdr4: |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 753 | s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0); |
| 754 | s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8); |
| 755 | s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16); |
| 756 | s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24); |
| 757 | s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0); |
| 758 | s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2); |
| 759 | s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4); |
| 760 | s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 761 | s(EmcMrw6, 27:0, scratch8, 27:0); |
| 762 | s(EmcMrw6, 31:30, scratch8, 29:28); |
| 763 | s(EmcMrw8, 27:0, scratch9, 27:0); |
| 764 | s(EmcMrw8, 31:30, scratch9, 29:28); |
| 765 | s(EmcMrw9, 27:0, scratch10, 27:0); |
| 766 | s(EmcMrw9, 31:30, scratch10, 29:28); |
| 767 | s(EmcMrw10, 27:0, scratch11, 27:0); |
| 768 | s(EmcMrw10, 31:30, scratch11, 29:28); |
| 769 | s(EmcMrw12, 27:0, scratch12, 27:0); |
| 770 | s(EmcMrw12, 31:30, scratch12, 29:28); |
| 771 | s(EmcMrw13, 27:0, scratch13, 27:0); |
| 772 | s(EmcMrw13, 31:30, scratch13, 29:28); |
| 773 | s(EmcMrw14, 27:0, scratch14, 27:0); |
| 774 | s(EmcMrw14, 31:30, scratch14, 29:28); |
| 775 | s(EmcMrw1, 7:0, scratch15, 7:0); |
| 776 | s(EmcMrw1, 23:16, scratch15, 15:8); |
| 777 | s(EmcMrw1, 27:26, scratch15, 17:16); |
| 778 | s(EmcMrw1, 31:30, scratch15, 19:18); |
| 779 | s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0); |
| 780 | s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8); |
| 781 | s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16); |
| 782 | s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18); |
| 783 | s(EmcMrw2, 7:0, scratch17, 7:0); |
| 784 | s(EmcMrw2, 23:16, scratch17, 15:8); |
| 785 | s(EmcMrw2, 27:26, scratch17, 17:16); |
| 786 | s(EmcMrw2, 31:30, scratch17, 19:18); |
| 787 | s(EmcMrw3, 7:0, scratch18, 7:0); |
| 788 | s(EmcMrw3, 23:16, scratch18, 15:8); |
| 789 | s(EmcMrw3, 27:26, scratch18, 17:16); |
| 790 | s(EmcMrw3, 31:30, scratch18, 19:18); |
| 791 | s(EmcMrw4, 7:0, scratch19, 7:0); |
| 792 | s(EmcMrw4, 23:16, scratch19, 15:8); |
| 793 | s(EmcMrw4, 27:26, scratch19, 17:16); |
| 794 | s(EmcMrw4, 31:30, scratch19, 19:18); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 795 | break; |
| 796 | case NvBootMemoryType_Ddr3: |
| 797 | s(EmcMrs, 13:0, scratch5, 13:0); |
| 798 | s(EmcEmrs, 13:0, scratch5, 27:14); |
| 799 | s(EmcMrs, 21:20, scratch5, 29:28); |
| 800 | s(EmcMrs, 31:30, scratch5, 31:30); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 801 | s(EmcEmrs2, 13:0, scratch8, 13:0); |
| 802 | s(EmcEmrs3, 13:0, scratch8, 27:14); |
| 803 | s(EmcEmrs, 21:20, scratch8, 29:28); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 804 | s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 805 | s(EmcEmrs, 31:30, scratch9, 15:14); |
| 806 | s(EmcEmrs2, 21:20, scratch9, 17:16); |
| 807 | s(EmcEmrs2, 31:30, scratch9, 19:18); |
| 808 | s(EmcEmrs3, 21:20, scratch9, 21:20); |
| 809 | s(EmcEmrs3, 31:30, scratch9, 23:22); |
| 810 | s(EmcWarmBootMrsExtra, 31:30, scratch9, 25:24); |
| 811 | s(EmcWarmBootMrsExtra, 21:20, scratch9, 27:26); |
| 812 | s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 29:28); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 813 | s(EmcMrs, 27:26, scratch10, 1:0); |
| 814 | s(EmcEmrs, 27:26, scratch10, 3:2); |
| 815 | s(EmcEmrs2, 27:26, scratch10, 5:4); |
| 816 | s(EmcEmrs3, 27:26, scratch10, 7:6); |
| 817 | s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8); |
| 818 | s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9); |
| 819 | s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10); |
| 820 | s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 821 | break; |
| 822 | default: |
| 823 | printk(BIOS_CRIT, "ERROR: %s() unrecognized MemoryType %d!\n", |
| 824 | __func__, sdram->MemoryType); |
| 825 | } |
| 826 | |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 827 | s32(EmcCmdMappingByte, secure_scratch8); |
| 828 | s32(EmcPmacroBrickMapping0, secure_scratch9); |
| 829 | s32(EmcPmacroBrickMapping1, secure_scratch10); |
| 830 | s32(EmcPmacroBrickMapping2, secure_scratch11); |
| 831 | s32(McVideoProtectGpuOverride0, secure_scratch12); |
| 832 | s(EmcCmdMappingCmd0_0, 6:0, secure_scratch13, 6:0); |
| 833 | s(EmcCmdMappingCmd0_0, 14:8, secure_scratch13, 13:7); |
| 834 | s(EmcCmdMappingCmd0_0, 22:16, secure_scratch13, 20:14); |
| 835 | s(EmcCmdMappingCmd0_0, 30:24, secure_scratch13, 27:21); |
| 836 | s(McVideoProtectBomAdrHi, 1:0, secure_scratch13, 29:28); |
| 837 | s(McVideoProtectWriteAccess, 1:0, secure_scratch13, 31:30); |
| 838 | s(EmcCmdMappingCmd0_1, 6:0, secure_scratch14, 6:0); |
| 839 | s(EmcCmdMappingCmd0_1, 14:8, secure_scratch14, 13:7); |
| 840 | s(EmcCmdMappingCmd0_1, 22:16, secure_scratch14, 20:14); |
| 841 | s(EmcCmdMappingCmd0_1, 30:24, secure_scratch14, 27:21); |
| 842 | s(McSecCarveoutAdrHi, 1:0, secure_scratch14, 29:28); |
| 843 | s(McMtsCarveoutAdrHi, 1:0, secure_scratch14, 31:30); |
| 844 | s(EmcCmdMappingCmd1_0, 6:0, secure_scratch15, 6:0); |
| 845 | s(EmcCmdMappingCmd1_0, 14:8, secure_scratch15, 13:7); |
| 846 | s(EmcCmdMappingCmd1_0, 22:16, secure_scratch15, 20:14); |
| 847 | s(EmcCmdMappingCmd1_0, 30:24, secure_scratch15, 27:21); |
| 848 | s(McGeneralizedCarveout5BomHi, 1:0, secure_scratch15, 29:28); |
| 849 | s(McGeneralizedCarveout3BomHi, 1:0, secure_scratch15, 31:30); |
| 850 | s(EmcCmdMappingCmd1_1, 6:0, secure_scratch16, 6:0); |
| 851 | s(EmcCmdMappingCmd1_1, 14:8, secure_scratch16, 13:7); |
| 852 | s(EmcCmdMappingCmd1_1, 22:16, secure_scratch16, 20:14); |
| 853 | s(EmcCmdMappingCmd1_1, 30:24, secure_scratch16, 27:21); |
| 854 | s(McGeneralizedCarveout2BomHi, 1:0, secure_scratch16, 29:28); |
| 855 | s(McGeneralizedCarveout4BomHi, 1:0, secure_scratch16, 31:30); |
| 856 | s(EmcCmdMappingCmd2_0, 6:0, secure_scratch17, 6:0); |
| 857 | s(EmcCmdMappingCmd2_0, 14:8, secure_scratch17, 13:7); |
| 858 | s(EmcCmdMappingCmd2_0, 22:16, secure_scratch17, 20:14); |
| 859 | s(EmcCmdMappingCmd2_0, 30:24, secure_scratch17, 27:21); |
| 860 | s(McGeneralizedCarveout1BomHi, 1:0, secure_scratch17, 29:28); |
| 861 | s(EmcAdrCfg, 0:0, secure_scratch17, 30:30); |
| 862 | s(EmcFbioSpare, 1:1, secure_scratch17, 31:31); |
| 863 | s(EmcCmdMappingCmd2_1, 6:0, secure_scratch18, 6:0); |
| 864 | s(EmcCmdMappingCmd2_1, 14:8, secure_scratch18, 13:7); |
| 865 | s(EmcCmdMappingCmd2_1, 22:16, secure_scratch18, 20:14); |
| 866 | s(EmcCmdMappingCmd2_1, 30:24, secure_scratch18, 27:21); |
| 867 | s(EmcFbioCfg8, 15:15, secure_scratch18, 28:28); |
| 868 | s(McEmemAdrCfg, 0:0, secure_scratch18, 29:29); |
| 869 | s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch18, 30:30); |
| 870 | s(McMtsCarveoutRegCtrl, 0:0, secure_scratch18, 31:31); |
| 871 | s(EmcCmdMappingCmd3_0, 6:0, secure_scratch19, 6:0); |
| 872 | s(EmcCmdMappingCmd3_0, 14:8, secure_scratch19, 13:7); |
| 873 | s(EmcCmdMappingCmd3_0, 22:16, secure_scratch19, 20:14); |
| 874 | s(EmcCmdMappingCmd3_0, 30:24, secure_scratch19, 27:21); |
| 875 | s(McGeneralizedCarveout2Cfg0, 6:3, secure_scratch19, 31:28); |
| 876 | s(EmcCmdMappingCmd3_1, 6:0, secure_scratch20, 6:0); |
| 877 | s(EmcCmdMappingCmd3_1, 14:8, secure_scratch20, 13:7); |
| 878 | s(EmcCmdMappingCmd3_1, 22:16, secure_scratch20, 20:14); |
| 879 | s(EmcCmdMappingCmd3_1, 30:24, secure_scratch20, 27:21); |
| 880 | s(McGeneralizedCarveout2Cfg0, 10:7, secure_scratch20, 31:28); |
| 881 | s(McGeneralizedCarveout4Cfg0, 26:0, secure_scratch39, 26:0); |
| 882 | s(McGeneralizedCarveout2Cfg0, 17:14, secure_scratch39, 30:27); |
| 883 | s(McVideoProtectVprOverride, 0:0, secure_scratch39, 31:31); |
| 884 | s(McGeneralizedCarveout5Cfg0, 26:0, secure_scratch40, 26:0); |
| 885 | s(McGeneralizedCarveout2Cfg0, 21:18, secure_scratch40, 30:27); |
| 886 | s(McVideoProtectVprOverride, 1:1, secure_scratch40, 31:31); |
| 887 | s(EmcCmdMappingCmd0_2, 6:0, secure_scratch41, 6:0); |
| 888 | s(EmcCmdMappingCmd0_2, 14:8, secure_scratch41, 13:7); |
| 889 | s(EmcCmdMappingCmd0_2, 22:16, secure_scratch41, 20:14); |
| 890 | s(EmcCmdMappingCmd0_2, 27:24, secure_scratch41, 24:21); |
| 891 | s(McGeneralizedCarveout1Cfg0, 6:3, secure_scratch41, 28:25); |
| 892 | s(McGeneralizedCarveout2Cfg0, 13:11, secure_scratch41, 31:29); |
| 893 | s(EmcCmdMappingCmd1_2, 6:0, secure_scratch42, 6:0); |
| 894 | s(EmcCmdMappingCmd1_2, 14:8, secure_scratch42, 13:7); |
| 895 | s(EmcCmdMappingCmd1_2, 22:16, secure_scratch42, 20:14); |
| 896 | s(EmcCmdMappingCmd1_2, 27:24, secure_scratch42, 24:21); |
| 897 | s(McGeneralizedCarveout1Cfg0, 13:7, secure_scratch42, 31:25); |
| 898 | s(EmcCmdMappingCmd2_2, 6:0, secure_scratch43, 6:0); |
| 899 | s(EmcCmdMappingCmd2_2, 14:8, secure_scratch43, 13:7); |
| 900 | s(EmcCmdMappingCmd2_2, 22:16, secure_scratch43, 20:14); |
| 901 | s(EmcCmdMappingCmd2_2, 27:24, secure_scratch43, 24:21); |
| 902 | s(McGeneralizedCarveout1Cfg0, 17:14, secure_scratch43, 28:25); |
| 903 | s(McGeneralizedCarveout3Cfg0, 13:11, secure_scratch43, 31:29); |
| 904 | s(EmcCmdMappingCmd3_2, 6:0, secure_scratch44, 6:0); |
| 905 | s(EmcCmdMappingCmd3_2, 14:8, secure_scratch44, 13:7); |
| 906 | s(EmcCmdMappingCmd3_2, 22:16, secure_scratch44, 20:14); |
| 907 | s(EmcCmdMappingCmd3_2, 27:24, secure_scratch44, 24:21); |
| 908 | s(McGeneralizedCarveout1Cfg0, 21:18, secure_scratch44, 28:25); |
| 909 | s(McVideoProtectVprOverride, 3:2, secure_scratch44, 30:29); |
| 910 | s(McVideoProtectVprOverride, 6:6, secure_scratch44, 31:31); |
| 911 | s(McEmemAdrCfgChannelMask, 31:9, secure_scratch45, 22:0); |
| 912 | s(McEmemAdrCfgDev0, 2:0, secure_scratch45, 25:23); |
| 913 | s(McEmemAdrCfgDev0, 9:8, secure_scratch45, 27:26); |
| 914 | s(McEmemAdrCfgDev0, 19:16, secure_scratch45, 31:28); |
| 915 | s(McEmemAdrCfgBankMask0, 31:10, secure_scratch46, 21:0); |
| 916 | s(McEmemAdrCfgDev1, 2:0, secure_scratch46, 24:22); |
| 917 | s(McEmemAdrCfgDev1, 9:8, secure_scratch46, 26:25); |
| 918 | s(McEmemAdrCfgDev1, 19:16, secure_scratch46, 30:27); |
| 919 | s(McVideoProtectVprOverride, 7:7, secure_scratch46, 31:31); |
| 920 | s(McEmemAdrCfgBankMask1, 31:10, secure_scratch47, 21:0); |
| 921 | s(McGeneralizedCarveout3Cfg0, 10:3, secure_scratch47, 29:22); |
| 922 | s(McVideoProtectVprOverride, 9:8, secure_scratch47, 31:30); |
| 923 | s(McEmemAdrCfgBankMask2, 31:10, secure_scratch48, 21:0); |
| 924 | s(McGeneralizedCarveout3Cfg0, 21:14, secure_scratch48, 29:22); |
| 925 | s(McVideoProtectVprOverride, 11:11, secure_scratch48, 30:30); |
| 926 | s(McVideoProtectVprOverride, 14:14, secure_scratch48, 31:31); |
| 927 | s(McVideoProtectGpuOverride1, 15:0, secure_scratch49, 15:0); |
| 928 | s(McEmemCfg, 13:0, secure_scratch49, 29:16); |
| 929 | s(McEmemCfg, 31:31, secure_scratch49, 30:30); |
| 930 | s(McVideoProtectVprOverride, 15:15, secure_scratch49, 31:31); |
| 931 | s(McGeneralizedCarveout3Bom, 31:17, secure_scratch50, 14:0); |
| 932 | s(McGeneralizedCarveout1Bom, 31:17, secure_scratch50, 29:15); |
| 933 | s(McVideoProtectVprOverride, 18:17, secure_scratch50, 31:30); |
| 934 | s(McGeneralizedCarveout4Bom, 31:17, secure_scratch51, 14:0); |
| 935 | s(McGeneralizedCarveout2Bom, 31:17, secure_scratch51, 29:15); |
| 936 | s(McVideoProtectVprOverride, 20:19, secure_scratch51, 31:30); |
| 937 | s(McGeneralizedCarveout5Bom, 31:17, secure_scratch52, 14:0); |
| 938 | s(McVideoProtectBom, 31:20, secure_scratch52, 26:15); |
| 939 | s(McVideoProtectVprOverride, 23:21, secure_scratch52, 29:27); |
| 940 | s(McVideoProtectVprOverride, 26:26, secure_scratch52, 30:30); |
| 941 | s(McVideoProtectVprOverride, 29:29, secure_scratch52, 31:31); |
| 942 | s(McVideoProtectSizeMb, 11:0, secure_scratch53, 11:0); |
| 943 | s(McSecCarveoutBom, 31:20, secure_scratch53, 23:12); |
| 944 | s(McVideoProtectVprOverride, 31:30, secure_scratch53, 25:24); |
| 945 | s(McVideoProtectVprOverride1, 1:0, secure_scratch53, 27:26); |
| 946 | s(McVideoProtectVprOverride1, 7:4, secure_scratch53, 31:28); |
| 947 | s(McSecCarveoutSizeMb, 11:0, secure_scratch54, 11:0); |
| 948 | s(McMtsCarveoutBom, 31:20, secure_scratch54, 23:12); |
| 949 | s(McVideoProtectVprOverride1, 15:8, secure_scratch54, 31:24); |
| 950 | s(McMtsCarveoutSizeMb, 11:0, secure_scratch55, 11:0); |
| 951 | s(McGeneralizedCarveout4Size128kb, 11:0, secure_scratch55, 23:12); |
| 952 | s(McVideoProtectVprOverride1, 16:16, secure_scratch55, 24:24); |
| 953 | s(McGeneralizedCarveout2Cfg0, 2:0, secure_scratch55, 27:25); |
| 954 | s(McGeneralizedCarveout2Cfg0, 25:22, secure_scratch55, 31:28); |
| 955 | s(McGeneralizedCarveout3Size128kb, 11:0, secure_scratch56, 11:0); |
| 956 | s(McGeneralizedCarveout2Size128kb, 11:0, secure_scratch56, 23:12); |
| 957 | s(McGeneralizedCarveout2Cfg0, 26:26, secure_scratch56, 24:24); |
| 958 | s(McGeneralizedCarveout1Cfg0, 2:0, secure_scratch56, 27:25); |
| 959 | s(McGeneralizedCarveout1Cfg0, 25:22, secure_scratch56, 31:28); |
| 960 | s(McGeneralizedCarveout1Size128kb, 11:0, secure_scratch57, 11:0); |
| 961 | s(McGeneralizedCarveout5Size128kb, 11:0, secure_scratch57, 23:12); |
| 962 | s(McGeneralizedCarveout1Cfg0, 26:26, secure_scratch57, 24:24); |
| 963 | s(McGeneralizedCarveout3Cfg0, 2:0, secure_scratch57, 27:25); |
| 964 | s(McGeneralizedCarveout3Cfg0, 25:22, secure_scratch57, 31:28); |
| 965 | s(McGeneralizedCarveout3Cfg0, 26:26, secure_scratch58, 0:0); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 966 | |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 967 | s32(McGeneralizedCarveout1Access0, secure_scratch59); |
| 968 | s32(McGeneralizedCarveout1Access1, secure_scratch60); |
| 969 | s32(McGeneralizedCarveout1Access2, secure_scratch61); |
| 970 | s32(McGeneralizedCarveout1Access3, secure_scratch62); |
| 971 | s32(McGeneralizedCarveout1Access4, secure_scratch63); |
| 972 | s32(McGeneralizedCarveout2Access0, secure_scratch64); |
| 973 | s32(McGeneralizedCarveout2Access1, secure_scratch65); |
| 974 | s32(McGeneralizedCarveout2Access2, secure_scratch66); |
| 975 | s32(McGeneralizedCarveout2Access3, secure_scratch67); |
| 976 | s32(McGeneralizedCarveout2Access4, secure_scratch68); |
| 977 | s32(McGeneralizedCarveout3Access0, secure_scratch69); |
| 978 | s32(McGeneralizedCarveout3Access1, secure_scratch70); |
| 979 | s32(McGeneralizedCarveout3Access2, secure_scratch71); |
| 980 | s32(McGeneralizedCarveout3Access3, secure_scratch72); |
| 981 | s32(McGeneralizedCarveout3Access4, secure_scratch73); |
| 982 | s32(McGeneralizedCarveout4Access0, secure_scratch74); |
| 983 | s32(McGeneralizedCarveout4Access1, secure_scratch75); |
| 984 | s32(McGeneralizedCarveout4Access2, secure_scratch76); |
| 985 | s32(McGeneralizedCarveout4Access3, secure_scratch77); |
| 986 | s32(McGeneralizedCarveout4Access4, secure_scratch78); |
| 987 | s32(McGeneralizedCarveout5Access0, secure_scratch79); |
| 988 | s32(McGeneralizedCarveout5Access1, secure_scratch80); |
| 989 | s32(McGeneralizedCarveout5Access2, secure_scratch81); |
| 990 | s32(McGeneralizedCarveout5Access3, secure_scratch82); |
| 991 | s32(McGeneralizedCarveout1ForceInternalAccess0, secure_scratch84); |
| 992 | s32(McGeneralizedCarveout1ForceInternalAccess1, secure_scratch85); |
| 993 | s32(McGeneralizedCarveout1ForceInternalAccess2, secure_scratch86); |
| 994 | s32(McGeneralizedCarveout1ForceInternalAccess3, secure_scratch87); |
| 995 | s32(McGeneralizedCarveout1ForceInternalAccess4, secure_scratch88); |
| 996 | s32(McGeneralizedCarveout2ForceInternalAccess0, secure_scratch89); |
| 997 | s32(McGeneralizedCarveout2ForceInternalAccess1, secure_scratch90); |
| 998 | s32(McGeneralizedCarveout2ForceInternalAccess2, secure_scratch91); |
| 999 | s32(McGeneralizedCarveout2ForceInternalAccess3, secure_scratch92); |
| 1000 | s32(McGeneralizedCarveout2ForceInternalAccess4, secure_scratch93); |
| 1001 | s32(McGeneralizedCarveout3ForceInternalAccess0, secure_scratch94); |
| 1002 | s32(McGeneralizedCarveout3ForceInternalAccess1, secure_scratch95); |
| 1003 | s32(McGeneralizedCarveout3ForceInternalAccess2, secure_scratch96); |
| 1004 | s32(McGeneralizedCarveout3ForceInternalAccess3, secure_scratch97); |
| 1005 | s32(McGeneralizedCarveout3ForceInternalAccess4, secure_scratch98); |
| 1006 | s32(McGeneralizedCarveout4ForceInternalAccess0, secure_scratch99); |
| 1007 | s32(McGeneralizedCarveout4ForceInternalAccess1, secure_scratch100); |
| 1008 | s32(McGeneralizedCarveout4ForceInternalAccess2, secure_scratch101); |
| 1009 | s32(McGeneralizedCarveout4ForceInternalAccess3, secure_scratch102); |
| 1010 | s32(McGeneralizedCarveout4ForceInternalAccess4, secure_scratch103); |
| 1011 | s32(McGeneralizedCarveout5ForceInternalAccess0, secure_scratch104); |
| 1012 | s32(McGeneralizedCarveout5ForceInternalAccess1, secure_scratch105); |
| 1013 | s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106); |
| 1014 | s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107); |
| 1015 | |
| 1016 | /* Locking PMC secure scratch register (8 ~ 15) for writing */ |
| 1017 | c(0x5555, sec_disable2, 15:0); |
| 1018 | /* Locking PMC secure scratch register (4~ 7) for both reading and writing */ |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 1019 | c(0xff, sec_disable, 19:12); |
| 1020 | |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 1021 | c32(0, scratch2); |
| 1022 | s(PllMInputDivider, 7:0, scratch2, 7:0); |
| 1023 | s(PllMFeedbackDivider, 7:0, scratch2, 15:8); |
| 1024 | s(PllMPostDivider, 4:0, scratch2, 20:16); |
| 1025 | s(PllMKVCO, 0:0, scratch2, 21:21); |
| 1026 | s(PllMKCP, 1:0, scratch2, 23:22); |
| 1027 | |
| 1028 | c32(0, scratch35); |
| 1029 | s(PllMSetupControl, 15:0, scratch35, 15:0); |
| 1030 | |
| 1031 | c32(0, scratch3); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 1032 | s(PllMInputDivider, 7:0, scratch3, 7:0); |
| 1033 | c(0x3e, scratch3, 15:8); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 1034 | c(0, scratch3, 20:16); |
| 1035 | s(PllMKVCO, 0:0, scratch3, 21:21); |
| 1036 | s(PllMKCP, 1:0, scratch3, 23:22); |
| 1037 | |
| 1038 | c32(0, scratch36); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 1039 | s(PllMSetupControl, 23:0, scratch36, 23:0); |
Yen Lin | ae3d71a | 2015-06-01 15:32:09 -0700 | [diff] [blame] | 1040 | |
| 1041 | c32(0, scratch4); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 1042 | s(PllMStableTime, 9:0, scratch4, 9:0); |
Patrick Georgi | 40a3e32 | 2015-06-22 19:41:29 +0200 | [diff] [blame] | 1043 | } |