blob: dba54654703e3e6bc6e1a36dde58ca9e10f175ba [file] [log] [blame]
Andrew Chew301f84c2014-02-10 16:36:53 -08001/*
2 * Copyright 2014 Google Inc.
3 * (C) Copyright 2010
4 * NVIDIA Corporation <www.nvidia.com>
5 *
Andrew Chew301f84c2014-02-10 16:36:53 -08006 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Andrew Chew301f84c2014-02-10 16:36:53 -080015 */
16
17#ifndef __SOC_NVIDIA_TEGRA_PWM_H
18#define __SOC_NVIDIA_TEGRA_PWM_H
19
20#include <types.h>
21
22/* Register definitions for the Tegra pwm controller */
23#define NV_PWM_CSR_ENABLE_SHIFT 31
24#define NV_PWM_CSR_PULSE_WIDTH_SHIFT 16
25
26struct pwm_reg {
27 u32 csr;
28 u32 rsvd[3];
29};
30
31struct pwm_controller {
32 struct pwm_reg pwm[4];
33};
34
35#endif /* __SOC_NVIDIA_TEGRA_PWM_H */