| Daisuke Nojiri | 55cb84b | 2014-12-29 16:04:23 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Google Inc. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | */ |
| 30 | |
| 31 | #include <arch/asm.h> |
| 32 | |
| 33 | .arm |
| 34 | ENTRY(stage_entry) |
| 35 | /* |
| 36 | * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data |
| 37 | * aborts may happen early and crash before the abort handlers are |
| 38 | * installed, but at least the problem will show up near the code that |
| 39 | * causes it. |
| 40 | */ |
| 41 | msr cpsr_cxf, #0xdf |
| 42 | bl _thumb_start |
| 43 | ENDPROC(stage_entry) |
| 44 | |
| 45 | .thumb |
| 46 | ENTRY(_thumb_start) |
| 47 | bl arm_init_caches |
| 48 | |
| 49 | /* |
| 50 | * From Cortex-A Series Programmer's Guide: |
| 51 | * Only CPU 0 performs initialization. Other CPUs go into WFI |
| 52 | * to do this, first work out which CPU this is |
| 53 | * this code typically is run before any other initialization step |
| 54 | */ |
| 55 | mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register |
| 56 | and r1, r1, #0x3 @ Extract CPU ID bits |
| 57 | cmp r1, #0 |
| 58 | bne wait_for_interrupt @ If this is not core0, wait |
| 59 | |
| 60 | /* |
| 61 | * Initialize the stack to a known value. This is used to check for |
| 62 | * stack overflow later in the boot process. |
| 63 | */ |
| 64 | ldr r0, =_stack |
| 65 | ldr r1, =_estack |
| 66 | ldr r2, =0xdeadbeef |
| 67 | init_stack_loop: |
| 68 | str r2, [r0] |
| 69 | add r0, #4 |
| 70 | cmp r0, r1 |
| 71 | bne init_stack_loop |
| 72 | |
| 73 | ldr sp, =_estack /* Set up stack pointer */ |
| 74 | bl main |
| 75 | |
| 76 | wait_for_interrupt: |
| 77 | wfi |
| 78 | mov pc, lr @ back to my caller |
| 79 | ENDPROC(_thumb_start) |